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參數(shù)資料
| 型號(hào)： | IDT70V9279S7PRFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM |
| 中文描述： | 32K X 16 DUAL-PORT SRAM, 18 ns, PQFP128 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128 |
| 文件頁數(shù)： | 5/19頁 |
| 文件大小： | 337K |
| 代理商： | IDT70V9279S7PRFI |
6.42
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
DD
= 3.3V ± 0.3V)
5
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(3,6)
(V
DD
= 3.3V ± 0.3V)
NOTE:
1. At V
DD
< 2.0V input leakages are undefined.
NOTES:
1. At f = f
MAX
, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/t
CYC
, using "AC TEST CONDITIONS" at input
levels of V
SS
to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD
= 3.3V, T
A
= 25°C for Typ, and are not production tested. I
DD DC
(f=0)
= 90mA (Typ).
5.
CE
X
= V
IL
means
CE
0X
= V
IL
and CE
1X
= V
IH
CE
X
= V
IH
means
CE
0X
= V
IH
or CE
1X
= V
IL
CE
X
< 0.2V means
CE
0X
< 0.2V and CE
1X
> V
DD
- 0.2V
CE
X
> V
DD
- 0.2V means
CE
0X
> V
DD
- 0.2V or CE
1X
< 0.2V
'X' represents "L" for left port or "R" for right port.
6. 'X' in part numbers indicate power rating (S or L).
Symbol
Parameter
Test Conditions
70V9279/69S
70V9279/69L
Unit
Min.
Max.
Min.
Max.
|I
LI
|
Input Leakage Current
(1)
V
DD
= 3.6V, V
IN
= 0V t
o
V
DD
___
10
___
5
μA
|I
LO
|
Output Leakage Current
CE0
= V
IH
or CE
1
= V
IL
, V
OUT
= 0V t
o
V
DD
___
10
___
5
μA
V
OL
Output Low Voltage
I
OL
= +4mA
___
0.4
___
0.4
V
V
OH
Output High Voltage
I
OH
= -4mA
2.4
___
2.4
___
V
3743 tbl 08
70V9279/69X6
Com'l Only
70V9279/69X7
Com'l Only
70V9279/69X9
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.
(4)
Max.
Typ.
(4)
Max.
Typ.
(4)
Max.
Unit
I
DD
Dynamic
Operating
Current (Both
Ports Active)
CE
L
and
CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
COM'L
S
L
220
220
395
350
200
200
335
290
180
180
260
225
mA
IND
S
L
____
____
____
____
____
____
____
____
180
180
270
235
I
SB1
Standby
Current (Both
Ports - TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
f = f
MAX
(1)
COM'L
S
L
70
70
145
130
60
60
115
100
50
50
75
65
mA
IND
S
L
____
____
____
____
____
____
____
____
50
50
85
75
I
SB2
Standby
Current (One
Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(1)
COM'L
S
L
150
150
280
250
130
130
240
210
110
110
170
150
mA
IND
S
L
____
____
____
____
____
____
____
____
110
110
180
160
I
SB3
Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports
CE
L
and
CE
R
> V
DD
- 0.2V,
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, f = 0
(2)
COM'L
S
L
1.0
0.4
5
3
1.0
0.4
5
3
1.0
0.4
5
3
mA
IND
S
L
____
____
____
____
____
____
____
____
1.0
0.4
5
3
I
SB4
Full Standby
Current (One
Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DD
- 0.2V
(5)
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, Active Port,
Outputs Disabled, f = f
MAX
(1)
COM'L
S
L
140
140
270
240
120
120
230
200
100
100
160
140
mA
IND
S
L
____
____
____
____
____
____
____
____
100
100
170
150
3743 tbl 09a
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