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參數(shù)資料
| 型號(hào)： | IDT7130LA55TFB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 1K X 8 DUAL-PORT SRAM, 55 ns, PQFP64 |
| 封裝： | STQFP-64 |
| 文件頁(yè)數(shù)： | 10/14頁(yè) |
| 文件大小： | 218K |
| 代理商： | IDT7130LA55TFB |
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IDT7130SA/LA AND IDT7140SA/LA
HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.01
10
TIMING WAVEFORM OF WRITE WITH
BUSY
(3)
BUSY
'B'
2689 drw 13
R/
W
'A'
t
WP
t
WH
t
WB
R/
W
'B'
(2)
(1)
NOTES:
1.
t
WH
must be met for both BUSY Input (IDT7140, slave) or Output (IDT7130 master).
2. BUSY is asserted on port 'B' blocking R/W'B', until BUSY'B' goes High.
3. All timing is the same for the left and right ports. Port 'A' may be either the left or right
port. Port "B" is opposite from port "A".
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY
CE
TIMING
(1)
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY ADDRESS MATCH TIMING
(1)
t
RC
OR
t
WC
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
2. If t
APS
is not satisified, the
BUSY
will be asserted on one side or the other, but there is no guarantee on which side
BUSY
will be
asserted (7130 only).
t
APS
ADDR
'A'
AND
'B'
ADDRESSES MATCH
t
BAC
t
BDC
CE
'B'
CE
'A'
BUSY
'A'
2689 drw 14
(2)
BUSY
'B'
ADDRESSES DO NOT MATCH
ADDRESSES MATCH
t
APS
ADDR
'A'
ADDR
'B'
2689 drw 15
(2)
t
BAA
t
BDA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7130SA20L48 | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
| IDT7130SA20L48B | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
| IDT7130SA20P | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
| IDT7130SA20PB | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
| IDT7130SA20PF | HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7130LA90P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7130SA100C | 功能描述:IC SRAM 8KBIT 100NS 48DIP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口，同步 存儲(chǔ)容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
| IDT7130SA100CB | 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 8KBIT 100NS SB48 |
| IDT7130SA100J | 功能描述:IC SRAM 8KBIT 100NS 52PLCC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| IDT7130SA100J8 | 功能描述:IC SRAM 8KBIT 100NS 52PLCC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:72 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 存儲(chǔ)容量:4.5M（256K x 18） 速度:133MHz 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x20） 包裝:托盤 |
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