參數(shù)資料
型號(hào): IDT7143SA25PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
中文描述: 2K X 16 DUAL-PORT SRAM, 25 ns, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 140K
代理商: IDT7143SA25PF
6.42
IDT7133SA/LA, IDT7143SA/LA
High-Speed 2K x 16 Dual-Port RAM Military, Industrial and Commercial Temperature Ranges
2746 drw 06
DATA
OUT
775
1250
30pF
5V
DATA
OUT
775
1250
5pF*
5V
BUSY
270
30pF
5V
,85
%$-
Input Pulse Levels
,*
9%3.2!3
9
!
:
&3
;#3
NOTES:
1. Vcc = 2V, T
A
= +25
°
C, and are not production tested.
2. t
RC
= Read Cycle Time
3. This parameter is guaranteed by device characterization but is not production tested.
Figure 2. Output Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig
Figure 1. AC Output Test Load
Figure 3.
BUSY
Output Load
(IDT7133 only)
7133LA/7143LA
Symbol
Parameter
Test Condition
Mn.
Typ.
(1)
Max.
Unit
V
DR
V
CC
for Data Retention
V
CC
= 2V
2.0
___
___
V
I
CCDR
Data Retention Current
CE
> V
HC
V
IN
> V
HC
or < V
LC
MIL. & IND.
___
100
4000
μA
COML.
___
100
1500
t
CDR
(3)
Chip Deselect to Data Retention Time
0
___
___
V
t
R
(3)
Operation Recovery Time
t
RC
(2)
___
___
V
2746 tbl 08
Input Rise/Fall Times
Input Timng Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1, 2 and 3
2746 tbl 09
2746 drw 05
t
CDR
t
R
CE
V
CC
DATA RETENTION MODE
V
DR
V
DR
> 2V
4.5V
4.5V
V
IH
V
IH
相關(guān)PDF資料
PDF描述
IDT7143SA25PFB HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
IDT7143SA25PFI HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
IDT7143SA35F HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
IDT7143SA35FB HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
IDT7143SA35FI HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS
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