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參數(shù)資料
| 型號： | IDT7164 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS STATIC RAM 64K (8K x 8-BIT) |
| 中文描述： | 64K的的CMOS靜態(tài)RAM（8K的× 8位） |
| 文件頁數(shù)： | 8/9頁 |
| 文件大?。?/td> | 104K |
| 代理商： | IDT7164 |
6.1
8
IDT7164S/L
CMOS STATIC RAM 64K (8K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
WE
CONTROLLED TIMING)
(1, 2, 6)
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CS
CONTROLLED TIMING)
(1, 2)
NOTES:
1.
WE
,
CS
1
or CS
2
must be inactive during all address transitions.
2. A write occurs during the overlap of a LOW
WE
, a LOW
CS
1
and a HIGH CS
2
.
3. t
WR1, 2
is measured from the earlier of
CS
1
or
WE
going HIGH or CS
2
going LOW to the end of the write cycle.
4. During this period, I/O pins are in the output state so that the input signals must not be applied.
5. If the
CS
1
LOW transition or CS
2
HIGH transition occurs simultaneously with or after the
WE
LOW transition, the outputs remain in a high-impedance state.
6.
OE
is continuously HIGH. If
OE
is LOW during a
WE
controlled write cycle, the write pulse width must be the larger of t
WP
or (t
WHZ
+t
DW
) to allow the
I/O drivers to turn off and data to be placed on the bus for the required t
DW
. If
OE
is HIGH during a
WE
controlled write cycle, this requirement does not
apply and the minimum write pulse width is as short as the specified t
WP
.
7. Transition is measured
±
200mV from steady state.
ADDRESS
t
WC
t
WHZ(7)
2967 drw 08
CS
1
DATA
OUT
CS
2
t
AS
t
AW
t
WR1(3)
WE
t
WP
t
OW(7)
DATA
IN
t
DH1, 2
t
DW
DATA VALID
(4)
(6)
2967 drw 09
ADDRESS
CS
1
CS
2
t
WC
t
AS
WE
t
CW
t
WR2(3)
t
AW
DATA
IN
t
DH1,2
t
DW
DATA VALID
t
WR1(3)
(5)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7164L100DB | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 64KBIT 100NS 28CDIP |
| IDT7164L120DB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7164L15P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7164L20DB | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 64KBIT 20NS 28CDIP |
| IDT7164L20TDB | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 64KBIT 20NS 28CDIP |
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