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參數(shù)資料
| 型號(hào)： | IDT7164S55YB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS STATIC RAM 64K (8K x 8-BIT) |
| 中文描述： | 64K的的CMOS靜態(tài)RAM（8K的× 8位） |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 104K |
| 代理商： | IDT7164S55YB |
6.1
5
IDT7164S/L
CMOS STATIC RAM 64K (8K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%, All Temperature Ranges)
7164S15
(1)
7164L15
(1)
Min.
7164S20
7164L20
Min.
7164S25
7164L25
Min.
7164S30
(2)
7164L30
Min.
Symbol
Parameter
Max.
Max.
Max.
Max.
Unit
Read Cycle
t
RC
Read Cycle Time
15
—
20
—
25
—
30
—
ns
t
AA
t
ACS1(3)
t
ACS2(3)
t
CLZ1,2(4)
Chip Select-1, 2 to Output in Low-Z
Address Access Time
—
15
—
19
—
25
—
29
ns
Chip Select-1 Access Tim
—
15
—
20
—
25
—
30
ns
Chip Select-2 Access Time
—
20
—
25
—
30
—
35
ns
5
—
5
—
5
—
5
—
ns
t
OE
t
OLZ(4)
t
CHZ1,2(4)
Chip Select-1, 2 to Output in High-Z
t
OHZ(4)
Output Disable to Output in High-Z
Output Enable to Output Valid
—
7
—
8
—
12
—
15
ns
Output Enable to Output in Low-Z
0
—
0
—
0
—
0
—
ns
—
8
—
9
—
13
—
13
ns
—
7
—
8
—
10
—
12
ns
t
OH
t
PU(4)
t
PD(4)
Output Hold from Address Change
5
—
5
—
5
—
5
—
ns
Chip Select to Power Up Time
0
—
0
—
0
—
0
—
ns
Chip Deselect to Power Down Time
—
15
—
20
—
25
—
30
ns
Write Cycle
t
WC
Write Cycle Time
15
—
20
—
25
—
30
—
ns
t
CW1, 2
Chip Select to End-of-Write
14
—
15
—
18
—
22
—
ns
t
AW
Address Valid to End-of-Write
14
—
15
—
18
—
22
—
ns
t
AS
Address Set-up Time
0
—
0
—
0
—
0
—
ns
t
WP
Write Pulse Width
Write Recovery Time
(
CS
1
,
WE
)
Write Recovery Time
(CS
2
)
14
—
15
—
21
—
23
—
ns
t
WR1
0
—
0
—
0
—
0
—
ns
t
WR2
t
WHZ(4)
5
—
5
—
5
—
5
—
ns
Write Enable to Output in High-Z
—
6
—
8
—
10
—
12
ns
t
DW
Data to Write Time Overlap
Data Hold from Write Time
(
CS
1
,
WE
)
Data Hold from Write Time
(CS
2
)
8
—
10
—
13
—
13
—
ns
t
DH1
0
—
0
—
0
—
0
—
ns
t
DH2
t
OW(4)
5
—
5
—
5
—
5
—
ns
Output Active from End-of-Write
4
—
4
—
4
—
4
—
ns
NOTES:
1. 0
°
to +70
°
C temperature range only.
2. –55
°
C to +125
°
C temperature range only. Also available: 100ns military devices.
3. Both chip selects must be active for the device to be selected.
4. This parameter is guaranteed by device characterization, but is not production tested.
2967 tbl 11
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