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參數(shù)資料
| 型號： | IDT7164S85PB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS STATIC RAM 64K (8K x 8-BIT) |
| 中文描述： | 64K的的CMOS靜態(tài)RAM（8K的× 8位） |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 104K |
| 代理商： | IDT7164S85PB |
6.1
4
IDT7164S/L
CMOS STATIC RAM 64K (8K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%)
IDT7164S
Min.
IDT7164L
Min.
Symbol
Parameter
Test Condition
Max.
Max.
Unit
|I
LI
|
Input Leakage Current
V
CC
= Max.,
V
IN
= GND to V
CC
MIL.
COM’L.
—
—
10
5
—
—
5
2
μ
A
|I
LO
|
Output Leakage Current
V
CC
= Max.,
CS
1
= V
IH,
V
OUT
= GND to V
CC
MIL.
COM’L.
—
—
10
5
—
—
5
2
μ
A
V
OL
Output Low Voltage
I
OL
= 8mA, V
CC
= Min.
I
OL
= 10mA, V
CC
= Min.
0.4
0.5
—
—
0.4
0.5
V
—
V
OH
Output High Voltage
I
OH
= –4mA, V
CC
= Min.
2.4
—
2.4
—
V
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
2967 tbl 10
*Includes scope and jig capacitances
Figure 2. AC Test Load
(for t
CLZ1,
t
CLZ2
, t
OLZ
, t
CHZ1,
t
CHZ2
, t
OHZ
, t
OW
, and t
WHZ
)
Figure 1. AC Test Load
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) (V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
Typ.
(1)
V
CC
@
Max.
V
CC
@
Symbol
V
DR
I
CCDR
Parameter
Test Condition
Min.
2.0
—
—
0
2.0v
—
10
10
—
3.0V
—
15
15
—
2.0V
—
200
60
—
3.0V
—
300
90
—
Unit
V
μ
A
V
CC
for Data Retention
Data Retention Current
—
MIL.
COM’L.
t
CDR(3)
Chip Deselect to Data
Retention Time
Operation Recovery Time
Input Leakage Current
1.
CS
1
≥
V
HC
CS
2
≥
V
HC
, or
2. CS
2
≤
V
LC
ns
t
R(3)
|I
LI
|
(3)
t
RC(2)
—
—
—
—
—
—
2
—
2
ns
μ
A
NOTES:
1. T
A
= +25
°
C.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
2967 tbl 09
2967 drw 03
480
30pF*
255
DATA
OUT
5V
2967 drw 04
480
5pF*
255
DATA
OUT
5V
2967 tbl 08
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