參數(shù)資料
型號(hào): IDT71V2546SA150BGI
廠商: Integrated Device Technology, Inc.
英文描述: Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 56pF; Working Voltage (Vdc)[max]: 500V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: C0G (NP0); Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Tape & Reel; Qty per Container: 1500
中文描述: 128K的× 36,256 × 18 3.3同步ZBT SRAM的2.5VI / O的脈沖計(jì)數(shù)器輸出流水線
文件頁(yè)數(shù): 10/28頁(yè)
文件大小: 1004K
代理商: IDT71V2546SA150BGI
6.42
10
IDT71V2546, IDT71V2548, 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
Interleaved Burst Sequence Table
(
LBO
=V
DD
)
Linear Burst Sequence Table
(
LBO
=V
SS
)
Functional Timing Diagram
(1)
NOTES:
1. This assumes
CEN
,
CE
1
, CE
2
,
CE
2
are all true.
2. All Address, Control and Data_In are only required to meet set-up and hold time with respect to the rising edge of clock. Data_Out is valid after a clock-to-data
delay fromthe rising edge of clock.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state and continues counting.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state and continues counting.
n+29
A29
C29
D/Q27
ADDRESS
(2)
(A0 - A16)
CONTROL
(2)
(R/
W
, ADV/
LD
,
BW
x)
DATA
(2)
I/O [0:31], I/O P[1:4]
CYCLE
CLOCK
n+30
A30
C30
D/Q28
n+31
A31
C31
D/Q29
n+32
A32
C32
D/Q30
n+33
A33
C33
D/Q31
n+34
A34
C34
D/Q32
n+35
A35
C35
D/Q33
n+36
A36
C36
D/Q34
n+37
A37
C37
D/Q35
5294 drw 03
,
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
0
0
0
1
1
0
1
1
Second Address
0
1
1
0
1
1
0
0
Third Address
1
0
1
1
0
0
0
1
Fourth Address
(1)
1
1
0
0
0
1
1
0
5294 tbl 11
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
0
0
0
1
1
0
1
1
Second Address
0
1
0
0
1
1
1
0
Third Address
1
0
1
1
0
0
0
1
Fourth Address
(1)
1
1
1
0
0
1
0
0
5294 tbl 10
相關(guān)PDF資料
PDF描述
IDT71V2546SA150BQ 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2546SA150BQI 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2546SA150PF 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2546SA150PFI 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2548S 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
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