參數(shù)資料
型號(hào): IDT71V2556SA
廠商: Integrated Device Technology, Inc.
元件分類: 通用總線功能
英文描述: 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
中文描述: 128K的× 36,256 × 18 3.3同步ZBT SRAM的2.5VI / O的脈沖計(jì)數(shù)器輸出流水線
文件頁(yè)數(shù): 28/28頁(yè)
文件大?。?/td> 1019K
代理商: IDT71V2556SA
6.42
28
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
Datasheet Document History
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
for Tech Support:
sramhelp@idt.com
800-544-7726
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
ZBT and ZeroBus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Mcron Technology and Motorola Inc.
6/30/99
8/23/99
Updated to new format
Added Smart ZBT functionality
Added Note 4 and changed Pins 38, 42, and 43 to DNU
Changed U2–U6 to DNU
Added Smart ZBT AC Electrical Characteristics
Improved t
CD
and t
OE
(
MAX
) at 166MHz
Revised t
CHZ
(
MIN
) for f
133 MHz
Revised t
OHZ
(
MAX
) for f
133 MHz
Improved t
CH
, t
CL
for f
166 MHz
Improved setup times for 100–200 MHz
Added BGA package diagrams
Added Datasheet Document History
Revised AC Electrical Characteristics table
Revised t
CHZ
to match t
CLZ
and t
CDC
at 133MHz and 100MHz
Removed Smart functionality
Added Industrial Temperature range offerings at the 100 to 166MHz speed grades.
Add clarification note to Recommended Temperature Ratings and Absolute Max Ratings
table; Add note to TQFP Pin Configurations
Add BGA Capacitance table
Add note to BGA Pin Configurations
Insert TQFP Package DiagramOutline
Add new package offering, 13 x 15mm165fBGA
Correct 119 BGA Package DiagramOutline
Add zz, sleep mode reference note to TQFP, BG119 and BQ165 pinouts
Update BQ165 pinout
Update BG119 package diagramoutlines
Remove Prelimnary Status
Add note to pin N5, BQ165 pinout reserved for JTAG
TRST
Added JTAG "SA" version functionality & updated ZZ pin descriptions and notes.
Updated pin configuration for the 119 BGA - reordered I/O signals on P6, P7 (128K x 36)
and P7, N6, L6, K7, H6, G7, F6, E7, D6 (256K x 18).
Pp. 4, 5
Pg. 6
Pg. 14
Pg. 15
Pg. 22
Pg. 24
Pg. 14
Pg. 15
10/4/99
12/31/99
04/30/00
Pg. 5,6
Pg. 6
Pg. 7
Pg. 21
05/26/00
Pg. 23
Pg. 5,6,7
Pg. 8
Pg. 23
07/26/00
10/25/00
Pg. 8
Pg. 1-8,15,22,23,27
Pg.7
5/20/02
10/15/04
相關(guān)PDF資料
PDF描述
IDT71V2556SA100BG 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2556SA100BGI 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2556SA100BQ Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 5600pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: C0G (NP0); Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Bag; Qty per Container: 250
IDT71V2556SA100BQI 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V2556SA100PF Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 5600pF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: C0G (NP0); Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Bag; Qty per Container: 250
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