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參數資料
| 型號： | IDT71V421L55PFI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | HIGH-SPEED 3.3V 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPT |
| 中文描述： | 的高速中斷3.3V的2K × 8雙端口靜態(tài)RAM |
| 文件頁數： | 2/14頁 |
| 文件大?。?/td> | 129K |
| 代理商： | IDT71V421L55PFI |
6.42
IDT71V321/71V421S/L
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges
IDT71V321/421J
J52-1
(4)
52-Pin PLCC
Top View
(5)
INDEX
I/O
A
A
A
A
A
A
A
A
A
I/O
I/O
I/O
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
3L
2L
OE
R
A
A
A
A
A
A
A
A
A
A
NC
I/O
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
7R
4
I
5
I
6
I
7
I
N
G
I
I
I
I
I
I
I
0
1
2
3
4
6
5
A
O
L
A
1
I
L
B
L
R
W
L
C
L
V
C
R
R
W
R
B
R
I
R
A
1
1
2
3
4
5
6
7
47
46
48
49
50
51
52
9
10
11
12
13
14
15
16
17
18
19
20
21
8
27
26
25
24
23
22
33
32
31
30
29
28
35
34
36
37
38
39
40
41
42
43
44
45
3026 drw 02
,
!
"
The IDT71V321/IDT71V421 are high-speed 2K x 8 Dual-Port
Static RAMs with internal interrupt logic for interprocessor communica-
tions. The IDT71V321 is designed to be used as a stand-alone 8-bit
Dual-Port RAMor as a "MASTER" Dual-Port RAMtogether with the
IDT71V421 "SLAVE" Dual-Port in 16-or-more-bit memory systemap-
plications results in full speed, error-free operation without the need for
additional discrete logic.
The device provides two independent ports with separate control,
address, and I/O pins that permt independent, asynchronous access
for reads or writes to any location in memory. An automatic power
down feature, controlled by
CE
, permts the on chip circuitry of each
port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these
devices typically operate on only 325mW of power. Low-power (L)
versions offer battery backup data retention capability, with each Dual-
Port typically consumng 200μW froma 2V battery.
The IDT71V321/IDT71V421 devices are packaged in a 52-pin
PLCC, a 64-pin TQFP (thin quad flatpack), and a 64-pin STQFP
(super thin quad flatpack).
INDEX
IDT71V321/421PF or TF
PP64-1
(4)
&
PN64-1
(4)
64-Pin STQFP
64-Pin TQFP
Top View
(5)
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
46
45
44
43
42
41
40
39
38
37
36
35
34
33
47
48
1
1
1
2
3
3
3
2
2
2
2
2
2
2
2
2
4
5
5
5
6
6
6
6
5
5
5
5
5
5
5
6
I/O
6R
N/C
A
7R
A
8R
A
9R
N/C
N/C
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
I/O
7R
OE
R
I/O
2L
A
0L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
N/C
OE
L
A
7L
A
8L
A
9L
N/C
I/O
0L
I/O
1L
G
4
I
5
I
6
I
7
I
I
0
I
1
I
2
I
3
I
4
I
5
I
3
N
N
G
N
N
A
1
V
C
B
L
R
W
L
C
R
R
W
R
B
R
C
L
N
N
A
1
V
C
N
I
R
I
L
3026 drw 03
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
PP64-1 package body is approximately 10mmx 10mmx 1.4mm
PN64-1 package body is approximately 14mmx 14mmx 1.4mm
4. This package code is used to reference the package diagram
5. This text does not indicate orientation of the actual part-marking.
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| IDT71V421L55TF | HIGH-SPEED 3.3V 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPT |
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| IDT71V421S25TF | HIGH-SPEED 3.3V 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPT |
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