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參數(shù)資料
| 型號： | IDT7201LA50J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| 中文描述： | 512 X 9 OTHER FIFO, 50 ns, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 152K |
| 代理商： | IDT7201LA50J |
5.03
7
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1K x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
EMPTY FLAG (
The Empty Flag (
EF
) will go low, inhibiting further read
operations, when the read pointer is equal to the write pointer,
indicating that the device is empty.
EF
)
EXPANSION OUT/HALF-FULL FLAG (
XO
This is a dual-purpose output. In the single device mode,
when Expansion In (
XI
) is grounded, this output acts as an
indication of a half-full memory.
After half of the memory is filled and at the falling edge of
the next write operation, the Half-Full Flag (
HF
) will be set low
and will remain set until the difference between the write
/
HF
)
pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (
HF
) is then
reset by using rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (
XI
) is con-
nected to Expansion Out (
XO
) of the previous device. This
output acts as a signal to the next device in the Daisy Chain
by providing a pulse to the next device when the previous
device reaches the last location of memory.
DATA OUTPUTS (Q
0
– Q
8
)
Data outputs for 9-bit wide data. This data is in a high
impedance condition whenever Read (
R
) is in a high state.
Figure 2. Reset
NOTES:
1.
EF
,
FF
,
HF
may change status during Reset, but flags will be valid at t
RSC
.
2.
W
and
R
= V
IH
around the rising edge of
RS
.
Figure 3. Asynchronous Write and Read Operation
HFH
t
RSC
t
RS
t
RSS
t
RSS
t
EFL
, t
FFH
t
RS
W
R
EF
HF, FF
t
RSR
2679 drw 04
t
A
R
t
RC
DATA OUT VALID
DATA OUT VALID
t
RPW
t
RLZ
t
DV
t
A
t
RHZ
t
RR
t
WC
t
WR
t
WPW
DATA IN VALID
DATA IN VALID
t
DS
t
DH
Q
0
– Q
8
2679 drw 05
W
D
0
– D
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7201LA50L | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| IDT7201LA50P | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| IDT7201LA65D | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| IDT7201LA65DB | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| IDT7201LA65J | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7201LA50J8 | 功能描述:IC MEM FIFO 512X9 50NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7201LA50P | 功能描述:IC MEM FIFO 512X9 50NS 28-PDIP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:74ABT 功能:同步，雙端口 存儲容量:4.6K（64 x 36 x2） 數(shù)據(jù)速率:67MHz 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:120-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:120-HLQFP（14x14） 包裝:托盤 產(chǎn)品目錄頁面:1005 (CN2011-ZH PDF) 其它名稱:296-3984 |
| IDT7201LA50SO | 功能描述:IC MEM FIFO 512X9 50NS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7201LA50SO8 | 功能描述:IC MEM FIFO 512X9 50NS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7201LA50TDB | 制造商:Integrated Device Technology Inc 功能描述:IC MEM FIFO 512X9 50NS 28TCERDIP 制造商:Integrated Device Technology Inc 功能描述:IC MEM FIFO 512X9 50NS 28-PDIP |
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