參數(shù)資料
型號: IDT7202LA25LB
廠商: Integrated Device Technology, Inc.
英文描述: CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9
中文描述: CMOS異步FIFO的256 × 9,512 × 9,每1000 × 9
文件頁數(shù): 5/14頁
文件大?。?/td> 153K
代理商: IDT7202LA25LB
5.09
5
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT72021, IDT72031, IDT72041
CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
AC ELECTRICAL CHARACTERISTICS — IDT72021
(1)
(Commercial: V
CC
= 5.0V
±
10%, T
A
= 0
°
C to +70
°
C; Military: V
CC
= 5V
±
10%, T
A
= –55
°
C to +125
°
C)
Com’l
72021L25
Min. Max.
Mil.
Com’l
72021L35
Min.
Mil.
Com’l & Mil.
72021L50
Min.
72021L30
Min.
72021L40
Min.
Symbol
f
S
Parameter
Max.
25
Max.
22.2
Max.
20
Max.
15
Unit
MHz
Shift Frequency
28.5
t
RC
t
A
t
RR
R
Cycle Time
Access Time
R
Recovery Time
R
Pulse Width
(2)
R
Pulse LOW to Data Bus at Low-Z
(3)
W
Pulse HIGH to Data Bus at Low-Z
(3,4)
Data Valid from
R
Pulse HIGH
R
Pulse HIGH to Data Bus at High-Z
(3)
W
Cycle Time
W
Pulse Width
(2)
W
Recovery Time
Data Set-up Time
Data Hold Time
35
10
25
40
10
30
45
10
35
50
10
40
65
15
50
ns
ns
ns
t
RPW
t
RLZ
t
WLZ
25
5
5
30
5
5
35
5
5
40
5
5
50
10
5
ns
ns
ns
t
DV
t
RHZ
t
WC
t
WPW
5
35
25
18
5
40
30
20
5
45
35
20
5
50
40
25
5
65
50
30
ns
ns
ns
ns
t
WR
t
DS
t
DH
10
15
0
10
18
0
10
18
0
10
20
0
15
30
5
ns
ns
ns
t
RSC
t
RS
t
RSS
RS
Cycle Time
RS
Pulse Width
(2)
RS
Set-up Time
RS
Recovery Time
RT
Cycle Time
RT
Pulse Width
(2)
RT
Recovery Time
RS
to
EF
and
AEF
LOW
RS
to
HF
and
FF
HIGH
R
LOW to
EF
LOW
R
HIGH to
FF
HIGH
R
Pulse Width After
EF
HIGH
W
HIGH to
EF
HIGH
W
LOW to
EF
LOW
W
LOW to
HF
LOW
R
HIGH to
HF
HIGH
W
Pulse Width after
FF
HIGH
R
HIGH to Transitioning
AEF
W
LOW to Transitioning
AEF
OE
HIGH to High-Z (Disable)
(3)
OE
LOW to Low-Z (Enable)
(3)
OE
LOW Data Valid (Q
0
–Q
8
)
35
25
25
40
30
30
45
35
35
50
40
40
65
50
50
ns
ns
ns
t
RSR
t
RTC
t
RT
10
35
25
10
40
30
10
45
35
10
50
40
15
65
50
ns
ns
ns
t
RTR
t
RSF1
t
RSF2
t
REF
10
35
35
25
10
40
40
30
10
45
45
30
10
50
50
35
15
65
65
45
ns
ns
ns
ns
t
RFF
t
RPE
t
WEF
25
25
25
30
30
30
35
30
30
40
35
35
50
45
45
ns
ns
ns
t
WFF
t
WHF
t
RHF
25
35
35
30
40
40
30
45
45
35
50
50
45
65
65
ns
ns
ns
t
WPF
t
RF
t
WF
25
35
35
30
40
40
35
45
45
40
50
50
50
65
65
ns
ns
ns
t
OEHZ
t
OELZ
t
AOE
0
0
12
12
15
0
0
15
15
18
0
0
17
17
20
0
0
20
20
25
0
0
25
25
30
ns
ns
ns
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Pulse widths less than minimum value are not allowed.
3. Values guaranteed by design, not currently tested.
4. Only applies to read data flow-through mode.
2677 tbl 08
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IDT7202LA25P CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9
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