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參數(shù)資料
| 型號(hào)： | IDT7203L80TP |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS ASYNCHRONOUS FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 |
| 中文描述： | 2K X 9 OTHER FIFO, 80 ns, PDIP28 |
| 封裝： | 0.300 INCH, THIN, PLASTIC, DIP-28 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 147K |
| 代理商： | IDT7203L80TP |
5.04
2
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO
2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
Rating
Terminal
Voltage with
Respect to
GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Commercial
–0.5 to + 7.0
Military
–0.5 to +7.0
Unit
V
T
A
0 to +70
–55 to +125
°
C
T
BIAS
–55 to +125
–65 to +135
°
C
T
STG
–55 to + 125
–65 to +155
°
C
I
OUT
50
50
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2661 tbl 01
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Parameter
V
CCM
Military Supply
Voltage
V
CCC
Commercial Supply
Voltage
GND
Supply Voltage
V
IH
(1)
Input High Voltage
Commercial
V
IH
(1)
Input High Voltage
Military
V
IL
(1)
Input Low Voltage
Commercial and
Military
Min.
4.5
Typ.
5.0
Max.
5.5
Unit
V
4.5
5.0
5.5
V
0
0
0
V
2.0
—
—
V
2.2
—
—
V
—
—
0.8
V
NOTE:
1. 1.5V undershoots are allowed for 10ns once per cycle.
2661 tbl 02
5
6
7
8
9
10
11
12
13
14
FF
Q
0
Q
1
Q
2
Q
3
Q
8
D
2
D
1
D
0
XI
GND
1
2
3
4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EF
XO/HF
Q
7
Vcc
D
4
FL/RT
RS
D
3
D
8
W
D
6
D
7
D
5
Q
5
Q
4
R
Q
6
P28-1
P28-2
D28-1
D28-3
SO28-3
2661 drw 02a
DIP
TOP VIEW
NOTES:
1. The THINDIPs P28-2 and D28-3 are only available for the 7203/7204/
7205.
2. The small outline package SO28-3 is only available for the 7204.
3. Consult factory for CERPACK pinout.
PLCC/LCC
TOP VIEW
5
6
7
8
9
10
11
12
13
J32-1
&
L32-1
FF
Q
0
Q
1
NC
Q
2
D
2
D
1
D
0
XI
29
28
27
26
25
24
23
22
21
EF
XO
/
HF
Q
7
Q
6
D
6
D
7
NC
FL
/
RT
RS
1
1
1
1
1
1
2
4
3
2
1
3
3
3
INDEX
D
3
D
8
W
N
V
D
5
D
G
Q
3
Q
8
N
Q
5
Q
4
R
2661 drw 02b
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| IDT7203L80TPB | CMOS ASYNCHRONOUS FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 |
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| IDT7203S40L | CMOS ASYNCHRONOUS FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 |
| IDT7203S40LB | CMOS ASYNCHRONOUS FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9 |
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