參數(shù)資料
型號: IDT7207L30D
廠商: Integrated Device Technology, Inc.
英文描述: CMOS ASYNCHRONOUS FIFO 32,768 x 9
中文描述: 的CMOS異步FIFO 32768 × 9
文件頁數(shù): 5/12頁
文件大?。?/td> 148K
代理商: IDT7207L30D
5.05
5
IDT7207 CMOS ASYNCHRONOUS FIFO
32,768 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Outputs:
FULL FLAG (
FF
further write operations, when the device is full. If the read
pointer is not moved after Reset (
RS
), the Full Flag (
FF
) will go
LOW after 32,768 writes.
)
— The Full Flag (
FF
) will go LOW, inhibiting
EMPTY FLAG (
EF
inhibiting further read operations, when the read pointer is equal
to the write pointer, indicating that the device is empty.
)
— The Empty Flag (
EF
) will go LOW,
EXPANSION OUT/HALF-FULL FLAG (
dual-purpose output. In the single device mode, when Expan-
sion In (
XI
) is grounded, this output acts as an indication of a half-
full memory.
After half of the memory is filled, and at the falling edge of the
next write operation, the Half-Full Flag (
HF
) will be set to LOW
XO
/
HF
) —
This is a
Figure 2. Reset
Figure 3. Asynchronous Write and Read Operation
NOTE:
1.
W
and
R
= V
IH
around the rising edge of
RS
.
and will remain set until the difference between the write pointer
and read pointer is less than or equal to one half of the total
memory of the device. The Half-Full Flag (
HF
) is then reset by
the rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (
XI
) is con-
nected to Expansion Out (
XO
) of the previous device. This
output acts as a signal to the next device in the Daisy Chain by
providing a pulse to the next device when the previous device
reaches the last location of memory. There will be an
XO
pulse
when the Write pointer reaches the last location of memory, and
an additional
XO
pulse when the Read pointer reaches the last
location of memory.
DATA OUTPUTS (Q
0
-Q
8
) —
Q
0
-Q
8
are data outputs for 9-
bit wide data. These outputs are in a high-impedance condition
whenever Read (
R
) is in a HIGH state.
W
RS
R
EF
HF
,
FF
t
RSC
t
RS
t
RSS
t
RSS
t
RSR
t
EFL
t
HFH
, t
FFH
3140 drw 05
R
W
D
t
RC
t
A
t
WR
t
DS
DATA
0
–D
8
Q
0
–Q
8
t
DH
t
WPW
t
WC
VALID
t
RLZ
t
RHZ
t
DV
t
A
t
RR
t
RPW
IN
VALID
DATA
OUT
VALID
DATA
OUT
DATA
IN
VALID
3140 drw 06
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參數(shù)描述
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