參數(shù)資料
型號(hào): IDT7207L50PB
廠商: Integrated Device Technology, Inc.
英文描述: CMOS ASYNCHRONOUS FIFO 32,768 x 9
中文描述: 的CMOS異步FIFO 32768 × 9
文件頁數(shù): 8/12頁
文件大小: 148K
代理商: IDT7207L50PB
5.05
8
IDT7207 CMOS ASYNCHRONOUS FIFO
32,768 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Figure 11. Expansion In
corresponding input control signals of multiple devices. Sta-
tus flags (
EF
,
FF
and
HF
) can be detected from any one device.
Figure 13 demonstrates an 18-bit word width by using two
IDT7207s. Any word width can be attained by adding addi-
tional IDT7207s (Figure 13).
Bidirectional Operation
Applications which require data buffering between two
systems (each system capable of Read and Write operations)
can be achieved by pairing IDT7207s as shown in Figure 16.
Both Depth Expansion and Width Expansion may be used in
this mode.
Data Flow-Through
Two types of flow-through modes are permitted, a read
flow-through and write flow-through mode. For the read flow-
through mode (Figure 17), the FIFO permits a reading of a
single word after writing one word of data into an empty FIFO.
The data is enabled on the bus in (t
WEF
+ t
A
) ns after the rising
edge of
W
, called the first write edge, and it remains on the bus
until the
R
line is raised from LOW-to-HIGH, after which the
bus would go into a three-state mode after t
RHZ
ns. The
EF
line
would have a pulse showing temporary deassertion and then
would be asserted.
In the write flow-through mode (Figure 18), the FIFO
permits the writing of a single word of data immediately after
reading one word of data from a full FIFO. The
R
line causes
the
FF
to be deasserted but the
W
line being LOW causes it to
be asserted again in anticipation of a new data word. On the
rising edge of
W
, the new word is loaded in the FIFO. The
W
line must be toggled when
FF
is not asserted to write new data
in the FIFO and to increment the write pointer.
Compound Expansion
The two expansion techniques described above can be
applied together in a straightforward manner to achieve large
FIFO arrays (see Figure 15).
W
R
XI
WRITE TO
FIRST PHYSICAL
LOCATION
t
XIS
READ FROM
FIRST PHYSICAL
LOCATION
t
XIS
t
XI
t
XIR
3140 drw 14
OPERATING MODES:
Care must be taken to assure that the appropriate flag is
monitored by each system (i.e.
FF
is monitored on the device
where
W
is used;
EF
is monitored on the device where
R
is
used). For additional information, refer to Tech Note 8:
Oper-
ating FIFOs on Full and Empty Boundary Conditions
and
Tech Note 6:
Designing with FIFOs.
Single Device Mode
A single IDT7207 may be used when the application
requirements are for 32,768 words or less. The IDT7207 is
in a Single Device Configuration when the Expansion In (
XI
)
control input is grounded (see Figure 12).
Depth Expansion
The IDT7207 can easily be adapted to applications when
the requirements are for greater than 32,768 words. Figure 14
demonstrates Depth Expansion using three IDT7207s. Any
depth can be attained by adding additional IDT7207s. The
IDT7207 operates in the Depth Expansion mode when the
following conditions are met:
1. The first device must be designated by grounding the First
Load (
FL
) control input.
2. All other devices must have
FL
in the HIGH state.
3. The Expansion Out (
XO
) pin of each device must be tied to
the Expansion In (
XI
) pin of the next device. See Figure 14.
4. External logic is needed to generate a composite Full Flag
(
FF
) and Empty Flag (
EF
). This requires the ORing of all
EF
s and ORing of all
FF
s (i.e. all must be set to generate the
correct composite
FF
or
EF
). See Figure 14.
5. The Retransmit (
RT
) function and Half-Full Flag (
HF
) are
not available in the Depth Expansion Mode.
For additional information, refer to Tech Note 9:
Cascading
FIFOs or FIFO Modules.
USAGE MODES:
Width Expansion
Word width may be increased simply by connecting the
相關(guān)PDF資料
PDF描述
IDT7207 CMOS ASYNCHRONOUS FIFO 32,768 x 9
IDT7208L20P CMOS ASYNCHRONOUS FIFO 65,536 x 9
IDT7208L25J CMOS ASYNCHRONOUS FIFO 65,536 x 9
IDT7208L25P CMOS ASYNCHRONOUS FIFO 65,536 x 9
IDT7208L35J CMOS ASYNCHRONOUS FIFO 65,536 x 9
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT7208L20J 功能描述:IC FIFO 64KX9 20NS 32PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:74ABT 功能:同步,雙端口 存儲(chǔ)容量:4.6K(64 x 36 x2) 數(shù)據(jù)速率:67MHz 訪問時(shí)間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:120-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:120-HLQFP(14x14) 包裝:托盤 產(chǎn)品目錄頁面:1005 (CN2011-ZH PDF) 其它名稱:296-3984
IDT7208L20J8 功能描述:IC FIFO 64KX9 20NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT7208L20JG 功能描述:IC FIFO 64KX9 20NS 32PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT7208L20JG8 功能描述:IC FIFO 64KX9 20NS 32PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT7208L20P 功能描述:IC FIFO 64KX9 20NS 28DIP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲(chǔ)容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時(shí)間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433