參數(shù)資料
型號: IDT7208L25P
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: CMOS ASYNCHRONOUS FIFO 65,536 x 9
中文描述: 64K X 9 OTHER FIFO, 25 ns, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 8/12頁
文件大小: 147K
代理商: IDT7208L25P
IDT7208 CMOS ASYNCHRONOUS FIFO
65,536 x 9
COMMERCIAL TEMPERATURE RANGES
5.06
8
OPERATING MODES:
Care must be taken to assure that the appropriate flag is
monitored by each system (i.e.
FF
is monitored on the device
where
W
is used;
EF
is monitored on the device where
R
is
used).
Single Device Mode
A single IDT7208 may be used when the application
requirements are for 65,536 words or less. The IDT7208 is
in a Single Device Configuration when the Expansion In (
XI
)
control input is grounded (see Figure 12).
Depth Expansion
The IDT7208 can easily be adapted to applications when
the requirements are for greater than 65,536 words. Figure 14
demonstrates Depth Expansion using three IDT7208s. Any
depth can be attained by adding additional IDT7208s. The
IDT7208 operates in the Depth Expansion mode when the
following conditions are met:
1. The first device must be designated by grounding the First
Load (
FL
) control input.
2. All other devices must have
FL
in the HIGH state.
3. The Expansion Out (
XO
) pin of each device must be tied to
the Expansion In (
XI
) pin of the next device. See Figure 14.
4. External logic is needed to generate a composite Full Flag
(
FF
) and Empty Flag (
EF
). This requires the ORing of all
EF
s and ORing of all
FF
s (i.e. all must be set to generate the
correct composite
FF
or
EF
). See Figure 14.
5. The Retransmit (
RT
) function and Half-Full Flag (
HF
) are
not available in the Depth Expansion Mode.
USAGE MODES:
Width Expansion
Word width may be increased simply by connecting the
corresponding input control signals of multiple devices. Sta-
tus flags (
EF
,
FF
and
HF
) can be detected from any one device.
Figure 13 demonstrates an 18-bit word width by using two
IDT7208s. Any word width can be attained by adding addi-
tional IDT7208s (Figure 13).
Bidirectional Operation
Applications which require data buffering between two
systems (each system capable of Read and Write operations)
can be achieved by pairing IDT7208s as shown in Figure 16.
Both Depth Expansion and Width Expansion may be used in
this mode.
Data Flow-Through
Two types of flow-through modes are permitted, a read
flow-through and write flow-through mode. For the read flow-
through mode (Figure 17), the FIFO permits a reading of a
single word after writing one word of data into an empty FIFO.
The data is enabled on the bus in (t
WEF
+ t
A
) ns after the rising
edge of
W
, called the first write edge, and it remains on the bus
until the
R
line is raised from LOW-to-HIGH, after which the
bus would go into a three-state mode after t
RHZ
ns. The
EF
line
would have a pulse showing temporary deassertion and then
would be asserted.
In the write flow-through mode (Figure 18), the FIFO
permits the writing of a single word of data immediately after
reading one word of data from a full FIFO. The
R
line causes
the
FF
to be deasserted but the
W
line being LOW causes it to
be asserted again in anticipation of a new data word. On the
rising edge of
W
, the new word is loaded in the FIFO. The
W
line must be toggled when
FF
is not asserted to write new data
in the FIFO and to increment the write pointer.
Compound Expansion
The two expansion techniques described above can be
applied together in a straightforward manner to achieve large
FIFO arrays (see Figure 15).
Figure 11. Expansion In
W
R
XI
WRITE TO
FIRST PHYSICAL
LOCATION
t
XIS
READ FROM
FIRST PHYSICAL
LOCATION
t
XIS
t
XI
t
XIR
3274 drw 14
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