- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄377397 > IDT7210L30G (Integrated Device Technology, Inc.) Current-Mode PWM Controller 8-PDIP -40 to 85 PDF資料下載
參數(shù)資料
| 型號(hào)： | IDT7210L30G |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Current-Mode PWM Controller 8-PDIP -40 to 85 |
| 中文描述： | 16 × 16并行CMOS乘法累加器 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 167K |
| 代理商： | IDT7210L30G |
11.2
4
IDT7210L
16 x 16 PARALLEL CMOS MULTIPLIER-ACCUMULATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PRELOAD TRUTH TABLE
PREL
TSX
0
0
0
0
TSM
0
0
TSL
0
1
XTP
Q
Q
MSP
Q
Q
LSP
Q
Hi Z
0
0
1
0
Q
Hi Z
Q
0
0
0
1
1
0
1
0
Q
Hi Z
Q
Hi Z
Q
Hi Z
0
1
0
1
Hi Z
Q
Hi Z
0
0
1
1
1
1
0
1
Hi Z
Hi Z
Hi Z
Hi Z
Q
Hi Z
1
1
0
0
0
0
0
1
Hi Z
Hi Z
Hi Z
Hi Z
Hi Z
PL
1
0
1
0
Hi Z
PL
Hi Z
1
1
0
1
1
0
1
0
Hi Z
PL
PL
Hi Z
PL
Hi Z
1
1
0
1
PL
Hi Z
PL
1
1
1
1
1
1
0
1
PL
PL
PL
PL
Hi Z
PL
NOTES:
Hi Z = Output buffers at high impedance (output disabled)
Q = Output buffers at low impedance. Contents of output register will be
transferred to output pins.
PL = Output buffers at high impedance or output disabled. Preload data
supplied externally at output pins will be loaded into the output
register at the rising edge of CLKP.
2577 tbl 02
NOTES ON TWO'S COMPLEMENT FORMATS
1. In two's complement notation, the location of the binary
point that signifies the separation of the fractional and
integer fileds is just after the sign, between the sign bit
(-2
°
) and the next significant bit for the multiplier inputs.
This same format is carried over to the output format,
except that the extended significance of the integer filed is
provided to extend the utility of the accumulator. In the
case of the output rotation, the output binary point is
located between the2
°
and 2
1
bit positions. The location of
the binary point is arbitrary, as long as there is consistency
with both the input and output formats. The number filed
can be considered entirely integer with the binary point just
to the right of the least significant bit for the input, product
and the accumulated sum.
2. When in the non-accumulating mode, the first four bits (P
34
to P
31
) will all indicate the sign of the product. Additionally,
the P
30
term will also indicate the sign with one exception,
when multiplying -1 x -1. With the additional bits that are
available in this multiplier, the –1 x –1 is a valid operation
that yields a +1 product.
3. In operations that require the accumulation of single prod-
ucts or sum of products, there is no change in format. To
allow for a valid summation beyond that available for a
single multiplication product, three additional significant
bits (guard bits) are provided. This is the same as if the
product was accumulated off-chip in a separate 35-bit wide
adder. Taking the sign at the most significant bit position
will guarantee that the largest number field will be used.
When the accumulated sum only occupies the right hand
portion of the accumulator, the sign will be extended into
the lesser significant bit positions.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CC
Rating
Commercial
-0.5 to +7.0
Military
-0.5 to +7.0
Unit
V
Power Supply
Voltage
Terminal Voltage
with Respect to
GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
DC Output
Current
V
TERM
–0.5 to
V
CC
+0.5V
–0.5 to
V
CC
+0.5V
V
T
A
0 to +70
–55 to +125
°
C
T
BIAS
–55 to +125
–65 to +135
°
C
T
STG
–55 to +125
–65 to +150
°
C
I
OUT
50
50
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
2577 tbl 03
CAPACITANCE
(T
A
= +25
°
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization and not 100%tested.
2577 tbl 04
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7210L30GB | High-Performance Current-Mode PWM Controller 14-SOIC -40 to 85 |
| IDT7210L30J | High-Performance Current-Mode PWM Controller 8-SOIC -40 to 85 |
| IDT7210L30JB | High-Performance Current-Mode PWM Controller 14-SOIC -40 to 85 |
| IDT7210L35C | 16 x 16 PARALLEL CMOS MULTIPLIER-ACCUMULATOR |
| IDT7210L35CB | High-Performance Current-Mode PWM Controller 14-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7210L35J | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7210L40FB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7210L45J | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT7210L65P | 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:MULTIPLIER/ACCUMULATOR, 64 Pin, Plastic, DIP |
| IDT72125L25SO | 功能描述:IC FIFO 1KX16 PAR-SER 28SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。