參數(shù)資料
型號: IDT72125L25SOG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/10頁
文件大?。?/td> 0K
描述: IC FIFO 1KX16 PAR-SER 28SOIC
標準包裝: 1,000
系列: 7200
功能: 異步
存儲容量: 16K (1K x 16)
訪問時間: 25ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.345",8.77mm 寬)
供應商設備封裝: 28-SOIC
包裝: 帶卷 (TR)
其它名稱: 72125L25SOG8
Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
DECEMBER 1999
1999 Integrated Device Technology, Inc.
DSC-2665/-
1
FEATURES:
25ns parallel port access time, 35ns cycle time
45MHz serial output shift rate
Wide x16 organization offering easy expansion
Low power consumption (50mA typical)
Least/Most Significant Bit first read selected by asserting
the FL/DIR pin
Four memory status flags: Empty, Full, Half-Full, and
Almost-Empty/Almost-Full
Dual-Port zero fall-through architecture
Available in 28-pin 300 mil plastic DIP and 28-pin SOIC
Industrial temperature range (–40
°C to +85°C)
DESCRIPTION:
The IDT72105/72115/72125s are very high-speed, low-
power,dedicated, parallel-to-serial FIFOs. These FIFOs
possess a 16-bit parallel input port and a serial output port with
256, 512 and 1,024 word depths, respectively.
The ability to buffer wide word widths (x16) make these
FIFOs ideal for laser printers, FAX machines, local area
CMOS PARALLEL-TO-SERIAL FIFO
256 x 16, 512 x 16, 1,024 x 16
IDT72105
IDT72115
IDT72125
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
networks (LANs), video storage and disk/tape controller ap-
plications.
Expansion in width and depth can be achieved using
multiple chips. IDT’s unique serial expansion logic makes this
possible using a minimum of pins.
The unique serial output port is driven by one data pin (SO)
and one clock pin (SOCP). The Least Significant or Most
Significant Bit can be read first by programming the DIR pin
after a reset.
Monitoring the FIFO is eased by the availability of four
status flags: Empty, Full, Half-Full and Almost-Empty/Almost-
Full. The Full and Empty flags prevent any FIFO data overflow
or underflow conditions. The Half-Full Flag is available in both
single and expansion mode configurations. The Almost-
Empty/Almost-Full Flag is available only in a single device
mode.
The IDT72105/72115/72125 are fabricated using IDT’s
leading edge, submicron CMOS technology. Military grade
product is manufactured in compliance with the latest revision
of Mil-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
2665 drw 01
RESET
LOGIC
FLAG
LOGIC
SERIAL OUTPUT
LOGIC
WRITE
POINTER
RAM
ARRAY
256 x 16
512 x 16
1,024 x 16
READ
POINTER
D0–15
16
EXPANSION
LOGIC
RSIX
RSOX
/DIR
SOCP
SO
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
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