參數(shù)資料
型號： IDT72132L35P
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9
中文描述： 2K X 9 OTHER FIFO, 35 ns, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 4/13頁
文件大小： 137K
代理商： IDT72132L35P
5.36
4
IDT72132, IDT72142
CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9
COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5.0V
±
10%, T
A
= 0
°
C to +70
°
C)
Commercial
IDT72132L35
IDT72142L35
Min.
—
—
IDT72132L50
IDT72142L50
Min.
—
—
Symbol
t
S
t
SICP
PARALLEL OUTPUT TIMINGS
t
A
Access Time
t
RR
Read Recovery Time
t
RPW
Read Pulse Width
t
RC
Read Cycle Time
t
RLZ
Read Pulse LOW to Data Bus at Low-Z
(1)
t
RHZ
Read Pulse HIGH to Data Bus at High-Z
(1)
t
DV
Data Valid from Read Pulse HIGH
t
OEHZ
Output Enable to High-Z (Disable)
(1)
t
OELZ
Output Enable to Low-Z (Enable)
(1)
t
AOE
Output Enable to Data Valid (Q
0-8
)
SERIAL INPUT TIMINGS
t
SIS
Serial Data in Set-Up Time to SICP Rising Edge
t
SIH
Serial Data in Hold Time to SICP Rising Edge
t
SIX
SIX Set-Up Time to SICP Rising Edge
t
SICW
Serial-In Clock Width HIGH/LOW
FLAG TIMINGS
t
SICEF
SICP Rising Edge (Last Bit - First Word) to
EF
HIGH
t
SICFF
SICP Rising Edge (Bit 1 - Last Word) to
FF
LOW
t
SICF
SICP Rising Edge to
HF
,
AEF
t
RFFSI
Recovery Time SICP After
FF
Goes HIGH
t
REF
Read LOW to
EF
LOW
t
RFF
Read HIGH to
FF
HIGH
t
RF
Read HIGH to Transitioning
HF
and
AEF
t
RPE
Read Pulse Width After
EF
HIGH
RESET TIMINGS
t
RSC
Reset Cycle Time
t
RS
Reset Pulse Width
t
RSS
Reset Set-up Time
t
RSR
Reset Recovery Time
t
RSF1
Reset to
EF
and
AEF
LOW
t
RSF2
Reset to
HF
and
FF
HIGH
t
RSDL
Reset to D LOW
t
POI
SICP Rising Edge to D
RETRANSMIT TIMINGS
t
RTC
Retransmit Cycle Time
t
RT
Retransmit Pulse Width
t
RTS
Retransmit Set-up Time
t
RTR
Retransmit Recovery Time
DEPTH EXPANSION MODE TIMINGS
t
XOL
Read/Write to
XO
LOW
t
XOH
Read/Write to
XO
HIGH
t
XI
XI
Pulse Width
t
XIR
XI
Recovery Time
t
XIS
XI
Set-up Time
Parameter
Max.
22.2
50
Max.
15
40
Unit
MHz
MHz
Parallel Shift Frequency
Serial-InShift Frequency
—
10
35
45
5
—
5
—
5
—
35
—
—
—
—
20
—
15
—
20
—
15
50
65
10
—
5
—
5
—
50
—
—
—
—
30
—
15
—
22
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
0
5
8
—
—
—
—
15
0
5
10
—
—
—
—
ns
ns
ns
ns
—
—
—
15
—
—
—
35
45
30
45
—
30
30
45
—
—
—
—
15
—
—
—
50
65
40
65
—
45
45
65
—
ns
ns
ns
ns
ns
ns
ns
ns
45
35
35
10
—
—
20
5
—
—
—
—
45
45
—
17
65
50
50
15
—
—
35
5
—
—
—
—
65
65
—
20
ns
ns
ns
ns
ns
ns
ns
ns
45
35
35
10
—
—
—
—
65
50
50
15
—
—
—
—
ns
ns
ns
ns
—
—
35
10
16
40
40
—
—
—
—
—
50
10
15
50
50
—
—
—
ns
ns
ns
ns
ns
NOTE:
2752 tbl 07
1. Guaranteed by design minimum times, not tested
相關(guān)PDF資料
PDF描述
IDT72142 CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9
IDT72142L35P CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9
IDT72132L50P Silver Mica Capacitor; Capacitance:910pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:100VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.9mm; Leaded Process Compatible:No RoHS Compliant: No
IDT72142L50P Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
IDT7216L55C 16 x 16 PARALLEL CMOS MULTIPLIERS
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