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參數(shù)資料
| 型號： | IDT72201L10JG8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FIFO 256X9 SYNC 10NS 32-PLCC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存儲容量： | 2.3K（256 x 9） |
| 數(shù)據(jù)速率： | 100MHz |
| 訪問時(shí)間： | 11.5ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 32-PLCC（13.97x11.43） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 72201L10JG8 |
7
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
OUTPUTS:
FULL FLAG (FF)
TheFullFlag(FF)willgoLOW,inhibitingfurtherwriteoperation,whenthe
device is full. If no reads are performed after Reset (RS), the Full Flag (FF)
willgoLOWafter64writesfortheIDT72421,256writesfortheIDT72201,512
writes for the IDT72211, 1,024 writes for the IDT72221, 2,048 writes for the
IDT72231,4,096writesfortheIDT72241,and8,192writesfortheIDT72251.
The Full Flag (FF) is synchronized with respect to the LOW-to-HIGH
transitionoftheWriteClock(WCLK).
EMPTY FLAG (EF)
TheEmptyFlag(EF)willgoLOW,inhibitingfurtherreadoperations,when
the read pointer is equal to the write pointer, indicating the device is empty.
The Empty Flag (EF) is synchronized with respect to the LOW-to-HIGH
transition of the Read Clock (RCLK).
PROGRAMMABLE ALMOST-FULL FLAG (PAF)
The Programmable Almost-Full flag (PAF) will go LOW when the FIFO
reachesthealmost-fullcondition.IfnoreadsareperformedafterReset(RS),
theProgrammableAlmost-Fullflag(PAF)willgoLOWafter(64-m)writesforthe
IDT72421,(256-m)writesfortheIDT72201,(512-m)writesfortheIDT72211,
TABLE 1 — STATUS FLAGS
NUMBER OF WORDS IN FIFO
IDT72421
IDT72201
IDT72211
FF
PAF
PAE
EF
00
0
H
L
1 to n
H
L
H
(n+1)to(64-(m+1))
(n+1)to(256-(m+1))
(n+1)to(512-(m+1))
H
(64-m)(2) to63
(256-m)(2) to255
(512-m)(2) to511
H
L
H
64
256
512
L
H
NUMBER OF WORDS IN FIFO
IDT72221
IDT72231
IDT72241
IDT72251
FF
PAF
PAE
EF
00
0
H
L
1 to n(1)
HH
L
H
(n+1)to(1,024-(m+1))
(n+1)to(2,048-(m+1))
(n+1)to(4,096-(m+1))
(n+1)to(8,192-(m+1))
H
(1,024-m)(2) to1,023
(2,048-m)(2) to2,047
(4,096-m)(2) to4,095
(8,192-m)(2) to8,191
H
L
H
1,024
2,048
4,096
8,192
L
H
NOTES:
1. n = Empty Offset (n = 7 default value)
2. m = Full Offset (m = 7 default value)
(1,024-m)writesfortheIDT72221,(2,048-m)writesfortheIDT72231,(4,096-
m)writesfortheIDT72241,and(8,192-m)writesfortheIDT72251. Theoffset
“m”isdefinedintheFulloffsetregisters.
IfthereisnoFulloffsetspecified,theProgrammableAlmost-Fullflag(PAF)
will go LOW at Full-7 words.
TheProgrammableAlmost-Fullflag(PAF)issynchronizedwithrespectto
theLOW-to-HIGHtransitionoftheWriteClock(WCLK).
PROGRAMMABLEALMOST-EMPTYFLAG(PAE)
TheProgrammableAlmost-Emptyflag(PAE)willgoLOWwhentheread
pointer is "n+1" locations less than the write pointer. The offset "n" is defined
in the Empty Offset registers. If no reads are performed after Reset the
Programmable Almost-Empty flag (PAE) will go HIGH after "n+1" for the
IDT72421/72201/72211/72221/72231/72241/72251.
IfthereisnoEmptyoffsetspecified,theProgrammableAlmost-Emptyflag
(PAE) will go LOW at Empty+7 words.
TheProgrammableAlmost-Emptyflag(PAE)issynchronizedwithrespect
to the LOW-to-HIGH transition of the Read Clock (RCLK).
DATA OUTPUTS (Q0 - Q8)
Data outputs for a 9-bit wide data.
(1)
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