參數(shù)資料
型號(hào)： IDT72201L25JI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： 24-Bit Ultra-Low Power Serializer Deserializer Supporting Single and Dual Displays (*Recommended for new designs); Package: MLP; No of Pins: 40; Container: Tape & Reel
中文描述： 256 X 9 OTHER FIFO, 15 ns, PQCC32
封裝： PLASTIC, LCC-32
文件頁(yè)數(shù)： 7/14頁(yè)
文件大?。?/td> 155K
代理商： IDT72201L25JI
7
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
OUTPUTS:
FULL FLAG (
FF
)
The Full Flag (
FF
) will go LOW, inhibiting further write operation, when the
device is full. If no reads are performed after Reset (
RS
), the Full Flag (
FF
)
will go LOW after 64 writes for the IDT72421, 256 writes for the IDT72201, 512
writes for the IDT72211, 1,024 writes for the IDT72221, 2,048 writes for the
IDT72231, 4,096 writes for the IDT72241, and 8,192 writes for the IDT72251.
The Full Flag (
FF
) is synchronized with respect to the LOW-to-HIGH
transition of the Write Clock (WCLK).
EMPTY FLAG (
EF
)
The Empty Flag (
EF
) will go LOW, inhibiting further read operations, when
the read pointer is equal to the write pointer, indicating the device is empty.
The Empty Flag (
EF
) is synchronized with respect to the LOW-to-HIGH
transition of the Read Clock (RCLK).
PROGRAMMABLE ALMOST-FULL FLAG (
PAF
)
The Programmable Almost-Full flag (
PAF
) will go LOW when the FIFO
reaches the almost-full condition. If no reads are performed after Reset (
RS
),
the Programmable Almost-Full flag (
PAF
) will go LOW after (64-m writes for the
IDT72421, (256-m writes for the IDT72201, (512-m writes for the IDT72211,
TABLE 1 — STATUS FLAGS
NUMBER OF WORDS IN FIFO
IDT72201
IDT72421
0
1 to n
(n+1) to (64-(m+1))
(64-m
(2)
to 63
64
IDT72211
0
1 to n
(n+1) to (512-(m+1))
(512-m
(2)
to 511
512
FF
H
H
H
H
L
PAF
H
H
H
L
L
PAE
L
L
H
H
H
EF
L
H
H
H
H
0
1 to n
(n+1) to (256-(m+1))
(256-m
(2)
to 255
256
NUMBER OF WORDS IN FIFO
IDT72231
0
IDT72221
0
IDT72241
0
IDT72251
0
FF
PAF
PAE
EF
H
H
L
L
1 to n
(1)
1 to n
(1)
1 to n
(1)
1 to n
(1)
H
H
L
H
(n+1) to (1,024-(m+1))
(n+1) to (2,048-(m+1))
(n+1) to (4,096-(m+1))
(n+1) to (8,192-(m+1))
H
H
H
H
(1,024-m
(2)
to 1,023
(2,048-m
(2)
to 2,047
(4,096-m
(2)
to 4,095
(8,192-m
(2)
to 8,191
H
L
H
H
1,024
2,048
4,096
8,192
L
L
H
H
NOTES:
1.
2.
n = Empty Offset (n = 7 default value)
m= Full Offset (m= 7 default value)
(1,024-m writes for the IDT72221, (2,048-m writes for the IDT72231, (4,096-
m writes for the IDT72241, and (8,192-m writes for the IDT72251. The offset
“m” is defined in the Full offset registers.
If there is no Full offset specified, the Programmable Almost-Full flag (
PAF
)
will go LOW at Full-7 words.
The Programmable Almost-Full flag (
PAF
) is synchronized with respect to
the LOW-to-HIGH transition of the Write Clock (WCLK).
PROGRAMMABLE ALMOST-EMPTY FLAG (
PAE
)
The Programmable Almost-Empty flag (
PAE
) will go LOW when the read
pointer is "n+1" locations less than the write pointer. The offset "n" is defined
in the Empty Offset registers. If no reads are performed after Reset the
Programmable Almost-Empty flag (
PAE
) will go HIGH after "n+1" for the
IDT72421/72201/72211/72221/72231/72241/72251.
If there is no Empty offset specified, the Programmable Almost-Empty flag
(
PAE
) will go LOW at Empty+7 words.
The Programmable Almost-Empty flag (
PAE
) is synchronized with respect
to the LOW-to-HIGH transition of the Read Clock (RCLK).
DATA OUTPUTS (Q
0
- Q
8
)
Data outputs for a 9-bit wide data.
(1)
(1)
(1)
相關(guān)PDF資料
PDF描述
IDT72201L25PF Low Voltage 28-Bit Flat Panel Display Link Serializers
IDT72201L25PFI Low Voltage 28-Bit Flat Panel Display Link Serializers; Package: TSSOP; No of Pins: 56; Container: Tape & Reel
IDT72251L10J CMOS SyncFIFOO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT72201L25JI8 功能描述:IC FIFO 256X9 SYNC 25NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72201L25LB 制造商: 功能描述: 制造商:undefined 功能描述:
IDT72201L25PF 功能描述:IC FIFO 256X9 SYNC 25NS 32-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72201L25PF8 功能描述:IC FIFO 256X9 SYNC 25NS 32-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
IDT72201L25PFI 功能描述:IC FIFO 256X9 SYNC 25NS 32-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF
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