參數(shù)資料
型號(hào): IDT72221L10J8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 9/14頁
文件大?。?/td> 0K
描述: IC FIFO SYNC 1KX9 10NS 32PLCC
標(biāo)準(zhǔn)包裝: 750
系列: 7200
功能: 同步
存儲(chǔ)容量: 9K(1K x 9)
數(shù)據(jù)速率: 100MHz
訪問時(shí)間: 10ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 32-PLCC(13.97x11.43)
包裝: 帶卷 (TR)
其它名稱: 72221L10J8
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
4
Figure 1. Output Load
*includesjigandscopecapacitances
or equivalent circuit
AC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 5V ± 10%, TA = 0
°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C)
Commercial
Com'l & Ind'l(1)
IDT72421L10
IDT72421L15
IDT72421L25
IDT72201L10
IDT72201L15
IDT72201L25
IDT72211L10
IDT72211L15
IDT72211L25
IDT72221L10
IDT72221L15
IDT72221L25
IDT72231L10
IDT72231L15
IDT72231L25
IDT72241L10
IDT72241L15
IDT72241L25
IDT72251L10
IDT72251L15
IDT72251L25
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
fS
Clock Cycle Frequency
100
66.7
40
MHz
tA
DataAccessTime
2
6.5
2
10
2
15
ns
tCLK
Clock Cycle Time
10
15
25
ns
tCLKH
ClockHighTime
4.5
6
10
ns
tCLKL
Clock Low Time
4.5
6
10
ns
tDS
DataSetupTime
3
4
6
ns
tDH
Data Hold Time
0.5
1
1
ns
tENS
EnableSetupTime
3
4
6
ns
tENH
Enable Hold Time
0.5
1
1
ns
tRS
ResetPulseWidth(2)
10
15
15
ns
tRSS
ResetSetupTime
8
10
15
ns
tRSR
Reset Recovery Time
8
10
15
ns
tRSF
Reset to Flag and Output Time
10
15
25
ns
tOLZ
OutputEnabletoOutputinLow-Z(3)
0—
0
0
ns
tOE
OutputEnabletoOutputValid
3
6
3
8
3
13
ns
tOHZ
OutputEnabletoOutputinHigh-Z(3)
36
3
8
3
13
ns
tWFF
Write Clock to Full Flag
6.5
10
15
ns
tREF
Read Clock to Empty Flag
6.5
10
15
ns
tPAF
WriteClocktoProgrammableAlmost-FullFlag
6.5
10
15
ns
tPAE
ReadClocktoProgrammableAlmost-EmptyFlag
6.5
10
15
ns
tSKEW1
Skew time between Read Clock & Write Clock for
5
6
10
ns
Empty Flag & Full Flag
tSKEW2
Skew time between Read Clock & Write Clock for
14
15
18
ns
Almost-EmptyFlag&ProgrammableAlmost-FullFlag
NOTES:
1. Industrial temperature range product for the 15ns and 25ns speed grades are available as standard product.
2. Pulse widths less than minimum values are not allowed.
3. Values guaranteed by design, not currently tested.
In Pulse Levels
GND to 3.0V
Input Rise/Fall Times
3ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
Output Load
See Figure 1
CAPACITANCE(Ta=+25°C,f=1.0MHz)
Symbol
Parameter
Conditions
Max.
Unit
CIN(2)
InputCapacitance
VIN = 0V
10
pF
COUT(1,2)
OutputCapacitance
VOUT = 0V
10
pF
30pF*
1.1K
5V
680
Ω
D.U.T.
2655 drw 03
NOTES:
1. With output deselected (OE
≥ VIH).
2. Characterized values, not currently tested.
AC TEST CONDITIONS
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