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參數(shù)資料
| 型號： | IDT72421L12PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
| 中文描述： | 64 X 9 OTHER FIFO, PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, TQFP-32 |
| 文件頁數(shù)： | 8/19頁 |
| 文件大小： | 214K |
| 代理商： | IDT72421L12PF |
5.07
8
IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OUTPUTS:
Full Flag (
further write operation, when the device is full. If no reads are
performed after Reset (
RS
), the Full Flag (
FF
) will go LOW
after 64 writes for the IDT72421, 256 writes for the IDT72201,
512 writes for the IDT72211, 1024 writes for the IDT72221,
2048 writes for the IDT72231, and 4096 writes for the IDT72241.
The Full Flag (
FF
) is synchronized with respect to the LOW-
to-HIGH transition of the write clock (WCLK).
FF
)
— The Full Flag (
FF
) will go LOW, inhibiting
Empty Flag (
inhibiting further read operations, when the read pointer is
equal to the write pointer, indicating the device is empty.
The Empty Flag (
EF
) is synchronized with respect to the
LOW-to-HIGH transition of the read clock (RCLK).
EF
)
— The Empty Flag (
EF
) will go LOW,
Programmable Almost-Full Flag (
PAF
Programmable Almost-Full Flag (
PAF
) will go LOW when the
FIFO reaches the Almost-Full condition. If no reads are
performed after Reset (
RS
), the Programmable Almost-Full
Flag (
PAF
) will go LOW after (64-m) writes for the IDT72421,
(256-m) writes for the IDT72201, (512-m) writes for the
IDT72211, (1024-m) writes for the IDT72221, (2048-m) writes
)
— The
for the IDT72231, and (4096-m) writes for the IDT72241. The
offset “m” is defined in the Full offset registers.
If there is no Full offset specified, the Programmable
Almost-Full Flag (
PAF
) will go LOW at Full-7 words.
The Programmable Almost-Full Flag (
PAF
) is synchronized
with respect to the LOW-to-HIGH transition of the write clock
(WCLK).
Programmable Almost-Empty Flag (
PAE
Programmable Almost-Empty Flag (
PAE
) will go LOW when
the read pointer is "n+1" locations less than the write pointer.
The offset "n" is defined in the Empty offset registers. If no
reads are performed after Reset the Programmable Almost-
Empty Flag (
PAE
) will go HIGH after "n+1" for the IDT72421/
72201/72211/72221/72231/72241.
If there is no Empty offset specified, the Programmable
Almost-Empty Flag (
PAE
) will go LOW at Empty+7 words.
The Programmable Almost-Empty Flag (
PAE
) is
synchronized with respect to the LOW-to-HIGH transition of
the read clock (RCLK).
)
— The
Data Outputs (Q
0
- Q
8
)
— Data outputs for a 9-bit wide
data.
TABLE 1: STATUS FLAGS
NUMBER OF WORDS IN FIFO
72201
72421
0
1 to n
72211
0
1 to n
FF
H
H
H
H
L
PAF
H
H
H
L
L
PAE
L
L
H
H
H
EF
L
H
H
H
H
0
1 to n
(n+1) to (64-(m+1))
(64-m)
to 63
64
(n+1) to (256-(m+1))
(256-m)
to 255
256
(n+1) to (512-(m+1))
(512-m)
to 511
512
(1)
(1)
NUMBER OF WORDS IN FIFO
72231
72221
0
72241
0
FF
H
PAF
H
PAE
L
EF
L
0
1 to n
(1)
1 to n
(1)
1 to n
(1)
H
H
L
H
(n+1) to (1024-(m+1))
(n+1) to (2048-(m+1))
(n+1) to (4096-(m+1))
H
H
H
H
(1024-m)
(2)
to 1023
(2048-m)
(2)
to 2047
(4096-m)
(2)
to 4095
H
L
H
H
1024
2048
4096
L
L
H
H
NOTES:
1. n = Empty Offset (n = 7 default value)
2. m = Full Offset (m = 7 default value)
(1)
(2)
(2)
(2)
2655 tbl 10
2655 tbl 11
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72421L12PFB | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
| IDT72421L15JB | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
| IDT72421L15L | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
| IDT72421L15LB | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
| IDT72421L15PFB | CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT72421L15J | 功能描述:IC FIFO 64X9 SYNC 15NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72421L15J8 | 功能描述:IC FIFO 64X9 SYNC 15NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72421L15JI | 功能描述:IC FIFO 64X9 SYNC 15NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72421L15JI8 | 功能描述:IC FIFO 64X9 SYNC 15NS 32-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72421L15PF | 功能描述:IC FIFO 64X9 SYNC 15NS 32-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
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