CORPORATE HEADQUARTERS for SALES: for Tech Support: 6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 408-360-1753 Sa" />
參數(shù)資料
型號: IDT72811L25TFI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 8/16頁
文件大?。?/td> 0K
描述: IC FIFO SYNC DUAL 512X9 64QFP
標(biāo)準(zhǔn)包裝: 1,250
系列: 7200
功能: 同步
存儲容量: 4.6K(512 x 9)
數(shù)據(jù)速率: 40MHz
訪問時間: 25ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 帶卷 (TR)
其它名稱: 72811L25TFI8
16
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
6024 Silver Creek Valley Road
800-345-7015 or 408-284-8200
408-360-1753
San Jose, CA 95138
fax: 408-284-2775
email:FIFOhelp@idt.com
www.idt.com
DEPTH EXPANSION — IDT72801/72811/72821/72831/72841/72851
can be adapted to applications that require greater than 256/512/1,024/
2,048/4,096/8,192 words. The existence of double enable pins on the read
and write ports allow depth expansion. The Write Enable 2/Load (WENA2,
WENB2) pins are used as a second write enables in a depth expansion
configuration, thus the Programmable flags are set to the default values.
Depth expansion is possible by using one enable input for system control
while the other enable input is controlled by expansion logic to direct the flow
of data. A typical application would have the expansion logic alternate data
accessfromonedevicetothenextinasequentialmanner. TheseFIFOsoperate
intheDepthExpansionconfigurationwhenthefollowingconditionsaremet:
1. WENA2/LDA and WENB2/LDB pins are held HIGH during Reset so
that these pins operate as second Write Enables.
2. External logic is used to control the flow of data.
Please see the Application Note" DEPTH EXPANSION OF IDT'S SYN-
CHRONOUS FIFOs USING THE RING COUNTER APPROACH" for details
of this configuration.
NOTES:
1
. Industrial temperature range product for 15ns and 25ns speed grade are available as a standard device.
2. Green parts are available. For specific speeds and packages contact your sales office.
ORDERING INFORMATION
BLANK
3034 drw 19
XXXXX
Device Type
XX
Power
Speed
Package
Process/
Temperature
Range
Clock Cycle Time
(tCLK), Speed in
Nanoseconds
Commercial (0°C to +70°C)
X
256 x 9 Dual SyncFIFO
Thin Quad Flatpack (TQFP, PN64-1)
10
72801
Commercial Only
PF
Low Power
XX
X
L
I(1)
Industrial (-40°C to +85°C)
TF
Slim Thin Quad Flatpack(STQFP, PP64-1)
15
25
Commercial and Industrial
72811
72821
72831
72841
72851
512 x 9 Dual SyncFIFO
1,024 x 9 Dual SyncFIFO
2,048 x 9 Dual SyncFIFO
4,096 x 9 Dual SyncFIFO
8,192 x 9 Dual SyncFIFO
X
G
(2)
Green
BLANK
8
Tube or Tray
Tape and Reel
X
DATASHEET DOCUMENT HISTORY
04/24/2001
pgs. 4, 5 and 16.
02/10/2006
pgs. 1 and 16.
01/13/2009
pg. 16.
03/20/2013
pg. 1, 3, 7 and 16.
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