參數(shù)資料
型號: IDT7285L12PA8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC FIFO 4096X18 12NS 56TSSOP
標準包裝: 2,000
系列: 7200
功能: 異步
存儲容量: 72K(4K x 18)
數(shù)據(jù)速率: 50MHz
訪問時間: 12ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應商設備封裝: 56-TSSOP
包裝: 帶卷 (TR)
其它名稱: 7285L12PA8
9
COMMERCIALTEMPERATURERANGE
IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO
DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
JUNE 29, 2012
Figure 14. Block Diagram of 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 FIFO Memory (Depth Expansion)
TABLE 1 — RESET AND RETRANSMIT
Single Device Configuration/Width Expansion Mode
Inputs
Internal Status
Outputs
Mode
RS
RT
XI
Read Pointer
Write Pointer
EF
FF
HF
Reset
0
X
0
LocationZero
0
1
Retransmit
1
0
LocationZero
Unchanged
X
Read/Write
1
0
Increment(1)
XXX
NOTE:
1. Pointer will increment if flag is High.
TABLE 2 — RESET AND FIRST LOAD TRUTH TABLE
Depth Expansion/Compound Expansion Mode
Inputs
Internal Status
Outputs
Mode
RS
FL
XI
Read Pointer
Write Pointer
EF
FF
Reset First Device
0
(1)
LocationZero
0
1
Reset All Other Devices
0
1
(1)
LocationZero
0
1
Read/Write
1
X
(1)
X
NOTE:
10
1. XI is connected to XO of previous device. See Figure 14. RS = Reset Input, FL/RT = First Load/Retransmit, EF = Empty Flag Output, FF = Full Flag Output,
XI = Expansion Input, HF = Half-Full Flag Output
D
W
FFB
EFB
FLB
XOB
RSA
FULL
EMPTY
V CC
R
9
99
XIB
9
Q
FFA
EFA
FLA
XOA
XIA
FFB
EFB
FLB
XIB
3208 drw 16
XOA
FIFO A
FIFO B
FIFO A
FIFO B
XIA
XOB
EFA
FLA
FFA
7280/7281/
7282/7283/
7284/7285
7280/7281/
7282/7283/
7284/7285
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