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參數(shù)資料
| 型號(hào)： | IDT7285lL |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9 |
| 中文描述： | CMOS雙異步FIFO雙256 × 9，雙512 × 9，雙1,024 × 9，雙2,048 × 9，雙4,096 × 9，雙8,192 × 9 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 154K |
| 代理商： | IDT7285LL |
7
COMMERCIAL TEMPERATURE RANGE
IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO
DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
Figure 9. Half-Full Flag Timing
Figure 10. Expansion Out
Figure 11. Expansion In
OPERATING MODES:
Care must be taken to assure that the appropriate flag is monitored by
each system(i.e.
FF
is monitored on the device where
W
is used;
EF
is monitored
on the device where
R
is used).
SINGLE DEVICE MODE
A single IDT7280/7281/7282/7283/7284/7285 may be used when the
application requirements are for 256/512/1,024/2,048/4,096/8,192 words or
less. These FIFOs are in a Single Device Configuration when the Expansion
In (
XI
) control input is grounded (see Figure 12).
DEPTH EXPANSION
These devices can easily be adapted to applications when the require-
ments are for greater than 256/512/1,024/2,048/4,096/8,192 words. Figure
14 demonstrates a four-FIFO Depth Expansion using two IDT7280/7281/
7282/7283/7284/7285s. Any depth can be attained by adding additional
IDT7280/7281/7282/7283/7284/7285s. These FIFOs operate in the Depth
Expansion mode when the following conditions are met:
1. The first FIFO must be designated by grounding the First Load (
FL
) control
input.
2. All other FIFOs must have
FL
in the HIGH state.
3. The Expansion Out (
XO
) pin of each device must be tied to the Expansion
In (
XI
) pin of the next device. See Figure 14.
4. External logic is needed to generate a composite Full Flag (
FF
) and Empty
Flag (
EF
). This requires the ORing of all
EF
s and ORing of all
FF
s (i.e. all
must be set to generate the correct composite
FF
or
EF
). See Figure 14.
5. The Retransmt (
RT
) function and Half-Full Flag (
HF
) are not available in
the Depth Expansion Mode.
R
W
HF
t
RHF
3208 drw 11
HALF-FULL OR LESS
MORE THAN HALF-FULL
HALF-FULL OR LESS
t
WHF
R
W
XO
3208 drw 12
WRITE TO
LAST PHYSICAL
LOCATION
t
XOL
t
XOH
READ FROM
LAST PHYSICAL
LOCATION
t
XOL
t
XOH
W
XI
R
3208 drw 13
WRITE TO
FIRST PHYSICAL
LOCATION
READ FROM
FIRST PHYSICAL
LOCATION
t
XIS
t
XIR
t
XI
t
XIS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7282L12 | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9 |
| IDT7282L12PA | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9 |
| IDT7282L12PAI | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9 |
| IDT7282L15 | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9 |
| IDT7282L15PA | CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1024 x 9 |
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