參數(shù)資料
型號： IDT72T36125L6BB
廠商： Integrated Device Technology, Inc.
英文描述： 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS
中文描述： 2.5伏高速TeraSyncTM FIFO的36位配置
文件頁數(shù)： 51/57頁
文件大?。?/td> 556K
代理商： IDT72T36125L6BB
51
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T3645/55/65/75/85/95/105/115/125 2.5V TeraSync
36-BIT FIFO
1K x 36, 2K x 36, 4K x 36, 8K x 36, 16K x 36, 32K x 36, 64K x 36, 128K x 36 and 256K x 36
Figure 29. Echo RCLK and Echo
REN
Operation (FWFT Mode Only)
NOTE:
1. The O/P Register is the internal output register. Its contents are available on the Qn output bus only when
RCS
and
OE
are both active, LOW, that is the bus is not in High-
Impedance state.
2.
OE
is LOW.
Cycle:
a&b.
At this point the FIFO is empty,
OR
is HIGH.
RCS
and
REN
are both disabled, the output bus is High-Impedance.
c.
Word Wn+1 falls through to the output register,
OR
goes active, LOW.
RCS
is HIGH, therefore the Qn outputs are High-Impedance.
EREN
goes LOW to indicate that a new word has been placed on the output register.
d.
EREN
goes HIGH, no new word has been placed on the output register on this cycle.
e.
No Operation.
f.
RCS
is LOW on this cycle, therefore the Qn outputs go to Low-Impedance and the contents of the output register (Wn+1) are made available.
NOTE:
In FWFT mode is important to take
RCS
active LOW at least one cycle ahead of
REN
, this ensures the word (Wn+1) currently in the output register is made
available for at least one cycle.
g.
REN
goes active LOW, this reads out the second word, Wn+2.
EREN
goes active LOW to indicate a new word has been placed into the output register.
h.
Word Wn+3 is read out,
EREN
remains active, LOW indicating a new word has been read out.
NOTE:
Wn+3 is the last word in the FIFO.
i.
This is the next enabled read after the last word, Wn+3 has been read out.
OR
flag goes HIGH and
EREN
goes HIGH to indicate that there is no new word available.
Qn
O/P
Reg.
t
A
t
REF
OR
5907 drw34
t
RCSLZ
REN
t
ENS
t
ENH
RCS
t
ENS
RCLK
a
b
c
d
e
f
g
h
i
W
n+1
WCLK
WEN
D0 - Dn
t
SKEW1
t
ENS
t
DS
t
ENH
W
n+2
W
n+3
ERCLK
EREN
t
CLKEN
t
CLKEN
t
CLKEN
t
CLKEN
W
n+1
W
n+2
W
n+3
t
A
t
REF
W
n+1
W
n+2
W
n+3
t
A
W
n
Last Word
t
A
t
A
t
DH
t
DH
t
DH
t
DS
t
DS
1
2
t
ERCLK
HIGH-Z
相關PDF資料
PDF描述
IDT72T3645L5BB 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS
IDT72T3655L5BB 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS
IDT72T3665L5BB 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS
IDT72T3685L5BB 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS
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