IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
參數(shù)資料
型號(hào)： IDT72V263L6PF8
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 33/45頁
文件大?。?/td> 0K
描述： IC FIFO 8192X18 6NS 80QFP
標(biāo)準(zhǔn)包裝： 750
系列： 72V
功能： 異步，同步
存儲(chǔ)容量： 144K（8K x 18）
數(shù)據(jù)速率： 166MHz
訪問時(shí)間： 4ns
電源電壓： 3.15 V ~ 3.45 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-TQFP（14x14）
包裝： 帶卷 (TR)
其它名稱： 72V263L6PF8
39
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
FEBRUARY 11, 2009
NOTES:
1. Use an AND gate in IDT Standard mode, an OR gate in FWFT mode.
2. Do not connect any output control signals directly together.
3. FIFO #1 and FIFO #2 must be the same depth, but may be different word widths.
OPTIONAL CONFIGURATIONS
WIDTH EXPANSION CONFIGURATION
Word width may be increased simply by connecting together the control
signals of multiple devices. Status flags can be detected from any one
device. The exceptions are the
EF and FF functions in IDT Standard mode
and the
IR and OR functions in FWFT mode. Because of variations in skew
between RCLK and WCLK, it is possible for
EF/FF deassertion and IR/OR
assertion to vary by one cycle between FIFOs. In IDT Standard mode, such
problems can be avoided by creating composite flags, that is, ANDing
EF
of every FIFO, and separately ANDing
FF of every FIFO. In FWFT mode,
Figure 29. Block Diagram of Width Expansion
For the x18 Input or x18 Output bus Width: 512 x 36, 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36 and 65,536 x 36
For both x9 Input and x9 Output bus Widths: 1,024 x 18, 2,048 x 18, 4,096 x 18, 8,192 x 18, 16,284 x 18, 32,768 x 18, 65,536 x 18 and 131,072 x 18
WRITE CLOCK (WCLK)
m + n
m
n
MASTER RESET (MRS)
READ CLOCK (RCLK)
DATA OUT
nm + n
WRITE ENABLE (WEN)
FULL FLAG/INPUT READY (FF/IR) #1
PROGRAMMABLE (PAF)
PROGRAMMABLE (PAE)
EMPTY FLAG/OUTPUT READY (EF/OR) #2
OUTPUT ENABLE (OE)
READ ENABLE (REN)
m
LOAD (LD)
IDT
72V223
72V233
72V243
72V253
72V263
72V273
72V283
72V293
EMPTY FLAG/OUTPUT READY (EF/OR) #1
PARTIAL RESET (PRS)
4666 drw32
FULL FLAG/INPUT READY (FF/IR) #2
HALF-FULL FLAG (HF)
FIRST WORD FALL THROUGH/
SERIAL INPUT (FWFT/SI)
RETRANSMIT (RT)
FIFO
#2
GATE
(1)
GATE
(1)
D0 - Dm
DATA IN
Dm+1 - Dn
Q0 - Qm
Qm+1 - Qn
FIFO
#1
IDT
72V223
72V233
72V243
72V253
72V263
72V273
72V283
72V293
composite flags can be created by ORing
OR of every FIFO, and separately
ORing
IR of every FIFO.
Figure29demonstratesawidthexpansionusingtwoIDT72V223/72V233/
72V243/72V253/72V263/72V273/72V283/72V293 devices. If x18 Input or
x18 Output bus Width is selected, D0-D17 from each device form a 36-bit wide
input bus and Q0-Q17 from each device form a 36-bit wide output bus. If both
x9 Input and x9 Output bus Widths are selected, D0-D8 from each device form
an18-bitwideinputbusandQ0-Q8fromeachdeviceforman18-bitwideoutput
bus.AnywordwidthcanbeattainedbyaddingadditionalIDT72V223/72V233/
72V243/72V253/72V263/72V273/72V283/72V293 devices.
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參數(shù)描述
IDT72V263L6PFG 功能描述:IC FIFO 8192X18 6NS 80QFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V263L7-5BC 功能描述:IC FIFO 8192X18 7-5NS 100BGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V263L7-5BCGI 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 8192X18 5NS 100LBGA
IDT72V263L7-5BCGI8 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 3.3V SUPERSYNC II 100LBG
IDT72V263L7-5BCI 功能描述:IC FIFO 8192X18 5NS 100LBGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
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