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參數(shù)資料
| 型號： | IDT72V70190PF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 10/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL SW 256X256 3.3V 64-TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | 72V |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 9:4 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-TQFP（14x14） |
| 包裝： | 托盤 |
| 其它名稱： | 72V70190PF |
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAB2210 Rev. 1.1.2
18
FAB2210
—
Audio
Subsystem
with
Class-G
Headphone
and
3.3W
Mono
Clas
s-D
Speaker
with
Dyna
mic
Range
Compressi
on
Slave Address
Each slave device on the bus must have a unique
address so the master can identify which device is
sending or receiving data. The FAB2210 slave address
is 1001101X binary where “X” is the read/write bit.
Master write operations are indicated when X=0. Master
read operations are indicated when X=1.
Writing to and Reading from the FAB2210
All read and write operations must begin with a START
condition generated by the master. After the START
condition, the master must immediately send a slave
address (7 bits), followed by a read/write bit. If the slave
address matches the address of the FAB2210, the
FAB2210 sends an ACK after receiving the read/write
bit by pulling the SDA line LOW for one clock cycle.
Setting the Pointer
For all operations, the pointer stored in the command
register must be pointing to the register that is going to
be written or read. To change the pointer value in the
command register, the read/write bit following the
address must be 0. This indicates that the master writes
new information into the command register.
After the FAB2210 sends an ACK in response to
receiving the address and read/write bit, the master
must transmit an appropriate 8-bit pointer value, as
explained in the I
2C Registers section. The FAB2210
sends an ACK after receiving the new pointer data.
The pointer set operation is illustrated in Figure 31 and
Figure 32. Any time a pointer set is performed, it must
be immediately followed by a read or write operation.
The command register retains the current pointer value
between operations; therefore, once a register is
indicated, subsequent read operations do not require a
pointer set cycle. Write operations always require the
pointer be reset.
Reading
If the pointer is already pointing to the desired register,
the master can read from that register by setting the
read/write bit (following the slave address) to 1. After
sending an ACK, the FAB2210 begins transmitting data
during the following clock cycle. The master should
respond with a NACK, followed by a STOP condition
(see Figure 29)
.
The master can read multiple bytes by responding to the
data with an ACK instead of a NACK and continuing to
send SCL pulses, as shown in Figure 30. The FAB2210
increments the pointer by one and sends the data from
the next register. The master indicates the last data byte
by responding with a NACK, followed by a STOP.
To read from a register other than the one currently
indicated by the command register, a pointer to the
desired register must be set. Immediately following the
pointer set, the master must perform a REPEAT START
condition (see Figure 32), which indicates to the
FAB2210 that a new operation is about to occur. If the
REPEAT START condition does not occur, the
FAB2210 assumes that a write is taking place and the
selected register is overwritten by the upcoming data on
the data bus. After the START condition, the master
must again send the device address and read/write bit.
This time, the read/write bit must be set to 1 to indicate
a read. The rest of the read cycle is the same as
described in the previous paragraphs for reading from a
preset pointer location.
Writing
All writes must be preceded by a pointer set, even if the
pointer is already pointing to the desired register.
Immediately following the pointer set, the master must
begin transmitting the data to be written. After
transmitting each byte of data, the master must release
the Serial Data (SDA) line for one clock cycle to allow
the FAB2210 to acknowledge receiving the byte. The
write operation should be terminated by a STOP
condition from the master (see Figure 31).
As with reading, the master can write multiple bytes by
continuing to send data. The FAB2210 increments the
pointer by one and accepts data for the next register.
The master indicates the last data byte by issuing a
STOP condition.
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