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參數(shù)資料
| 型號： | IDT74FCT138TEB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 2.2UFD/250VDC METAL P0LY CAP |
| 中文描述： | 快速CMOS 1 - 8解碼器，使能 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大小： | 106K |
| 代理商： | IDT74FCT138TEB |
IDT54/74FCT138T/AT/CT
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.3
5
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
SWITCH POSITION
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
V
OH
1.5V
V
OL
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
V
OH
ETC.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
2570 tbl 08
2570 drw 04
2570 drw 06
2570 drw 05
2570 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
2570 drw 07
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相關代理商/技術參數(shù) |
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|---|---|
| IDT74FCT138TP | 制造商:Integrated Device Technology Inc 功能描述: |
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| IDT74FCT139ATQ | 制造商:Integrated Device Technology Inc 功能描述: |
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