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參數(shù)資料
| 型號： | IDT74FCT16260CTPA |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER |
| 中文描述： | FCT SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 132K |
| 代理商： | IDT74FCT16260CTPA |
5.4
3
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN DESCRIPTION
Signal
A
(1:12)
1B
(1:12)
2B
(1:12
)
LEA1B
I/O
I/O
I/O
I/O
I
Description
Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.
Bidirectional Data Port 1B. Connected to the even path or even bank of memory.
Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory.
Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on
the HIGH to LOW transition of LEA1B.
Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-Port is latched on
the HIGH to LOW transition of LEA2B.
Latch Enable Input for the 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched
on the HIGH to LOW transition of LE1B.
Latch Enable Input for the 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched
on the HIGH to LOW transition of LE2B.
1B or 2B Path Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables
data transfer from 2B Port to A Port.
Output Enable for A Port (Active LOW).
Output Enable for 1B Port (Active LOW).
LEA2B
I
LE1B
I
LE2B
I
SEL
I
OEA
I
I
OE1B
OE2B
I
Output Enable for 2B Port (Active LOW).
3032 tbl 01
ABSOLUTE MAXIMUM RATINGS
(1)
FUNCTION TABLES
(2)
3032 tbl 04
Inputs
SEL
H
H
Output
A
H
L
A
(1)
H
L
A
(1)
Z
1B
H
L
2B
X
X
LE1B
H
H
LE2B
X
X
OEA
L
L
X
X
X
X
H
L
H
L
L
L
X
X
X
H
H
L
L
L
X
X
X
X
L
X
X
X
L
X
L
H
Inputs
Outputs
A
H
L
LEA1B LEA2B
OE1B
H
H
H
H
OE2B
1B
H
L
2B
H
L
B
(1)
B
(1)
H
L
L
L
L
H
L
H
H
H
L
L
L
H
L
L
L
L
L
L
H
L
B
(1)
B
(1)
B
(1)
Z
L
X
X
L
L
X
H
L
X
L
L
H
L
L
H
L
B
(1)
Z
X
X
X
X
X
X
X
X
X
L
H
L
H
L
L
Active
Z
Active
Z
Active
Active
3032 tbl 05
NOTES:
1. Output level before the indicated steady-state input conditions were
established.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
↑
= LOW-to-HIGH Transition
Symbol
V
TERM(2)
Terminal Voltage with Respect to
GND
V
TERM(3)
Terminal Voltage with Respect to
GND
Description
Max.
Unit
V
–0.5 to +7.0
–0.5 to
V
CC
+0.5
–65 to +150
–60 to +120 mA
V
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
Storage Temperature
DC Output Current
°
C
3032 tbl 02
CAPACITANCE
(T
A
= +25
°
C, F = 1.0MH
Z
)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
I/O
I/O
Capacitance
3032 tbl 03
Conditions
V
IN
= 0V
Typ.
3.5
Max.
6.0
Unit
pF
V
OUT
= 0V
3.5
8.0
pF
NOTE:
1. This parameter is measured at characterization but not tested.
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