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IDT54/74FCT543T/AT/CT/DT
IDT54/74FCT2543T/AT/CT
Integrated Device Technology, Inc.
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JANUARY 1995
1995 Integrated Device Technology, Inc.
6.17
DSC-4203/5
1
DESCRIPTION:
The FCT543T/FCT2543T is a non-inverting octal trans-
ceiver built using an advanced dual metal CMOS technology.
This device contains two sets of eight D-type latches with
separate input and output controls for each set. For data flow
from A to B, for example, the A-to-B Enable (
CEAB
) input must
be LOW in order to enter data from A
0
–A
7
or to take data from
B
0
–B
7
, as indicated in the Function Table. With
CEAB
LOW,
a LOW signal on the A-to-B Latch Enable (
LEAB
) input makes
the A-to-B latches transparent; a subsequent LOW-to-HIGH
transition of the
LEAB
signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With
CEAB
and
OEAB
both LOW, the 3-state B output buffers
are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the
CEBA
,
LEBA
and
OEBA
inputs.
The FCT2543T has balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot and controlled output fall times-reducing the need
for external series terminating resistors. FCT2xxxT parts are
plug-in replacements for FCTxxxT parts.
FEATURES:
Common features:
–
Low input and output leakage
≤
1
μ
A (max.)
–
CMOS power levels
–
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
–
Meets or exceeds JEDEC standard 18 specifications
–
Product available in Radiation Tolerant and Radiation
Enhanced versions
–
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
–
Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
Features for FCT543T:
–
Std., A, C and D speed grades
–
High drive outputs (-15mA I
OH
, 64mA I
OL
)
–
Power off disable outputs permit “l(fā)ive insertion”
Features for FCT2543T:
–
Std., A, and C speed grades
–
Resistor outputs
(-15mA I
OH
, 12mA I
OL
Com.)
(-12mA I
OH
, 12mA I
OL
Mil.)
–
Reduced system switching noise
2613 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
A
1
A
2
A
3
A
4
A
5
A
6
A
7
Q
OEBA
B
1
B
2
B
3
B
4
B
5
B
6
B
7
CEBA
LEBA
OEAB
CEAB
LEAB
DETAIL A x 7
D
LE
Q
D
LE
DETAIL A
A
0
B
0