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參數(shù)資料
| 型號： | IDT74FCT2573DTPYB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | FAST CMOS OCTAL TRANSPARENT LATCHES |
| 中文描述： | 快速CMOS八路透明鎖存 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 182K |
| 代理商： | IDT74FCT2573DTPYB |
6.12
6
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT373T/2373T/573T/2573T
FCT373AT/2373AT/573AT/2573AT
Com'l.
Mil.
Com'l.
Mil.
Symbol
t
PLH
t
PHL
Parameter
Conditions
(1)
C
L
= 50pF
R
L
= 500
Min
.
(2)
1.5
Max
.
8.0
Min
.
(2)
1.5
Max
.
8.5
Min
.
(2)
1.5
Max
.
5.2
Min
.
(2)
1.5
Max
.
5.6
Unit
ns
Propagation Delay
D
N
to O
N
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
Propagation Delay
LE to O
N
Output Enable Time
2.0
13.0
2.0
15.0
2.0
8.5
2.0
9.8
ns
1.5
12.0
1.5
13.5
1.5
6.5
1.5
7.5
ns
Output Disable Time
1.5
7.5
1.5
10.0
1.5
5.5
1.5
6.5
ns
Set-up Time HIGH
or LOW, D
N
to LE
Hold Time HIGH
or LOW, D
N
to LE
LE Pulse Width HIGH
2.0
—
2.0
—
2.0
—
2.0
—
ns
t
H
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
W
6.0
—
6.0
—
5.0
—
6.0
—
ns
2564 tbl 10
2564 tbl 11
FCT533T
FCT533AT
FCT533CT
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
Parameter
Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
C
L
= 50pF
R
L
= 500
2.0
13.0
2.0
14.0
2.0
8.5
Propagation Delay
D
N
to
O
N
Propagation Delay
LE to
O
N
Output Enable
Time
Output Disable
Time
Set-up Time HIGH
or LOW, D
N
to LE
Hold Time HIGH
or LOW, D
N
to LE
LE Pulse Width HIGH
1.5
10.0
1.5
12.0
1.5
5.2
1.5
5.6
1.5
4.2
1.5
5.1
ns
2.0
9.8
2.0
5.5
2.0
8.0
ns
1.5
11.0
1.5
12.5
1.5
6.5
1.5
7.5
1.5
5.5
1.5
6.3
ns
1.5
7.0
1.5
8.5
1.5
5.5
1.5
6.5
1.5
5.0
1.5
5.9
ns
2.0
—
2.0
—
2.0
—
2.0
—
2.0
—
2.0
—
ns
t
H
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
W
6.0
—
6.0
—
5.0
—
6.0
—
5.0
—
6.0
—
2564 tbl 12
ns
FCT373CT/2373CT/573CT/2573CT
FCT373DT/573DT
Com'l.
Mil.
Com'l.
Mil.
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
Parameter
Conditions
(1)
C
L
= 50pF
R
L
= 500
Min
.
(2)
1.5
Max
.
4.2
Min
.
(2)
1.5
Max
.
5.1
Min
.
(2)
1.5
Max
.
3.8
Min
.
(2)
—
Max
.
—
Unit
ns
Propagation Delay
D
N
to O
N
Propagation Delay
LE to O
N
Output Enable Time
2.0
5.5
2.0
8.0
2.0
4.0
—
—
ns
1.5
5.5
1.5
6.3
1.5
4.8
—
—
ns
Output Disable Time
1.5
5.0
1.5
5.9
1.5
4.0
—
—
ns
Set-up Time HIGH
or LOW, D
N
to LE
Hold Time HIGH
or LOW, D
N
to LE
LE Pulse Width HIGH
(3)
2.0
—
2.0
—
1.5
—
—
—
ns
t
H
1.5
—
1.5
—
1.0
—
—
—
ns
t
W
5.0
—
6.0
—
3.0
—
—
—
ns
NOTES
:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
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| IDT74FCT2573DTQ | FAST CMOS OCTAL TRANSPARENT LATCHES |
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