V
參數(shù)資料
型號: IDT74FCT543ATQG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 2/7頁
文件大?。?/td> 0K
描述: IC TRANSCEIVER 8BIT N-INV 24QSOP
標(biāo)準(zhǔn)包裝: 3,000
系列: 74FCT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 15mA,64mA
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
其它名稱: 74FCT543ATQG8
INDUSTRIALTEMPERATURERANGE
2
IDT74FCT543AT/CT/DT
FASTCMOSOCTALLATCHEDTRANSCEIVER
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–60 to +120
mA
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
2
3
1
20
19
18
15
16
9
10
A6
A7
B6
B7
23
22
24
21
17
5
6
7
4
8
A1
OEBA
A0
VCC
A2
A5
A3
A4
CEBA
B2
B0
B1
B3
B4
B5
LEBA
13
14
11
12
CEAB
GND
LEAB
OEAB
PIN DESCRIPTION
Pin Names
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A0–A7
A-to-B Data Inputs or B-to-A 3-State Outputs
B0–B7
B-to-A Data Inputs or A-to-B 3-State Outputs
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