參數(shù)資料
型號(hào): IDT74FCT543CTQG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 3/7頁(yè)
文件大?。?/td> 0K
描述: IC TRANSCEIVER 8BIT N-INV 24QSOP
標(biāo)準(zhǔn)包裝: 55
系列: 74FCT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 15mA,64mA
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 管件
其它名稱: 74FCT543CTQG
INDUSTRIALTEMPERATURERANGE
IDT74FCT543AT/CT/DT
FASTCMOSOCTALLATCHEDTRANSCEIVER
3
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5A at TA = –55°C.
5. This parameter is guaranteed but not tested.
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min
IOH = –8mA
2.4
3.3
V
VIN = VIH or VIL
IOH = –15mA
2
3
VOL
Output LOW Voltage
VCC = Min
IOL = 64mA
0.3
0.55
V
VIN = VIH or VIL
IOS
Short Circuit Current
VCC = Max., VO = GND(3)
–60
–120
–225
mA
IOFF
Input/Output Power Off Leakage(5)
VCC = 0V, VIN or VO
≤≤≤≤≤ 4.5V
±1 A
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
0.8
V
IIH
Input HIGH Current(4)
VCC = Max.
VI = 2.7V
±1 A
IIL
Input LOW Current(4)
VCC = Max.
VI = 0.5V
±1 A
IOZH
High Impedance Output Current
VCC = Max
VO = 2.7V
±1 A
IOZL
(3-State output pins)(4)
VO = 0.5V
±1
II
Input HIGH Current(4)
VCC = Max., VI = VCC (Max.)
±1 A
VIK
Clamp Diode Voltage
VCC = Min, IIN = -18mA
–0.7
–1.2
V
VH
Input Hysteresis
200
mV
ICC
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
0.01
1
mA
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
FUNCTION TABLE(1, 2)
For A-to-B (Symmetric with B-to-A)
Latch
Output
Inputs
Status
Buffers
CEAB
LEAB
OEAB
A-to-B
B0–B7
H
X
Storing
High Z
X
H
X
Storing
X
H
X
High Z
L
Transparent
Current A Inputs
L
H
L
Storing
Previous* A Inputs
NOTES:
1. * Before LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2. A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA
and
OEBA.
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