![](http://datasheet.mmic.net.cn/330000/IDT54FCT841BTPB_datasheet_16403404/IDT54FCT841BTPB_1.png)
Integrated Device Technology, Inc.
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST CMOS
BUS INTERFACE
LATCHES
DESCRIPTION:
The FCT8xxT series is built using an advanced dual metal
CMOS technology.
The FCT8xxT bus interface latches are designed to elimi-
nate the extra packages required to buffer existing latches
and provide extra data width for wider address/data paths or
buses carrying parity. The FCT841T are buffered, 10-bit wide
versions of the popular FCT373T function. They are ideal for
use as an output port requiring high I
OL
/I
OH
.
All of the FCT8xxT high-performance interface family can
drive large capacitive loads, while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp
diodes to ground and all outputs are designed for low-capaci-
tance bus loading in high-impedance state.
FEATURES:
Common features:
–
Low input and output leakage
≤
1
μ
A (max.)
–
CMOS power levels
–
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
–
Meets or exceeds JEDEC standard 18 specifications
–
Product available in Radiation Tolerant and Radiation
Enhanced versions
–
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
–
Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
Features for FCT841T:
–
A, B, C and D speed grades
–
High drive outputs (-15mA I
OH
, 48mA I
OL
)
–
Power off disable outputs permit “l(fā)ive insertion”
IDT54/74FCT841AT/BT/CT/DT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JUNE 1996
1996 Integrated Device Technology, Inc.
6.22
2571/6
FUNCTIONAL BLOCK DIAGRAM
D
0
D
LEQ
Y
0
LE
OE
D
1
D
LEQ
Y
1
D
2
D
LEQ
Y
2
D
3
D
LEQ
Y
3
D
4
D
LEQ
Y
4
D
5
D
LEQ
Y
5
D
8
D
LEQ
Y
8
D
9
D
LEQ
Y
9
2571 drw 01