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參數(shù)資料
| 型號： | IDT74FCT863ASO8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | FCT SERIES, 9-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 71K |
| 代理商： | IDT74FCT863ASO8 |
COMMERCIALTEMPERATURERANGE
2
IDT74FCT863A/B
HIGH-PERFORMANCECMOS9-BITNON-INVERTINGTRANSCEIVER
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC
V
TA
Operating Temperature
0 to +70
° C
TBIAS
Temperature under BIAS
–55 to +125
° C
TSTG
Storage Temperature
–55 to +125
° C
PT
Power Dissipation
0.5
W
IOUT
DC Output Current
120
mA
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
SOIC
TOP VIEW
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
RT
9
OET1
OET2
OER1
OER2
LOGIC SYMBOL
2
3
1
20
19
18
15
16
23
22
24
21
17
VCC
OET1
13
14
T6
T7
T2
T5
T3
T4
T8
T0
T1
OET2
9
10
R6
R7
R2
R5
R3
R4
R8
5
6
7
4
8
R0
OER1
11
12
R1
GND
OER2
PIN DESCRIPTION
Name
I/O
Description
OERI
I
When LOW in conjunction with
OETI HIGH
activates the RECEIVE mode.
OETI
I
When LOW in conjunction with
OERI HIGH
activates the TRANSMIT mode.
RI
I/O
9-bit RECEIVE input/output.
TI
I/O
9-bit TRANSMIT input/output.
FUNCTION TABLE(1)
Inputs
Outputs
OET
OER
RI
TI
RI
TI
Function
L
H
L
N/A
L
Transmitting
L
H
N/A
H
Transmitting
H
L
N/A
L
N/A
Receiving
H
L
N/A
H
N/A
Receiving
H
X
Z
High Z
NOTE:
1. H = HIGH
L = LOW
Z = High Impedance
X = Don’t Care
N/A = Not Applicable
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