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參數(shù)資料
| 型號(hào)： | IDT74LVC02APY |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 封裝： | 0.65 MM PITCH, SSOP-14 |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | IDT74LVC02APY |
4
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC02A
3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NOR GATE
O pen
V LOAD
GN D
VCC
Pulse
G enerator
D.U.T.
500
500
C L
R T
VIN
VOUT
(1, 2)
LVC Q U A D Link
IN PU T
VIH
0V
VOH
V OL
tPLH1
tSK (x)
OU TP U T 1
OU TP U T 2
tPHL1
tSK (x)
tPLH2
tPHL2
VT
V OH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
LV C QUAD L in k
DA TA
IN PU T
0V
tREM
TIM IN G
IN PU T
AS YN C H RO N O U S
CO NTRO L
SY NCH RO NO US
CO NTRO L
tSU
tH
tSU
tH
V IH
VT
V IH
VT
V IH
VT
V IH
VT
LO W -H IGH -LOW
PU LSE
H IG H -LO W -H IG H
PU LSE
VT
tW
SA M E PH AS E
IN PU T TR AN S ITIO N
O PPO SITE P H AS E
IN PU T TR AN S ITIO N
0V
VOH
VOL
tPLH
tPHL
tPLH
OU TPU T
VT
VIH
VT
VIH
VT
CO NTRO L
IN PU T
tPLZ
0V
OU TPU T
NO RM ALLY
LO W
tPZH
0V
SW ITCH
CL O SE D
OU TPU T
NO RM ALLY
HIG H
EN ABLE
D ISAB LE
SW ITCH
OP EN
tPHZ
0V
VLZ
V OH
VT
tPZL
VLOAD/2
VIH
VT
VOL
V HZ
LV C QUAD L in k
LVC Q U AD Link
LVC QU AD L in k
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
SWITCH POSITION
OUTPUT SKEW - tsk (x)
PULSE WIDTH
Symbol
VCC(1)= 2.5V ±0.2V
VCC(2)= 3.3V ±0.3V & 2.7V
Unit
VLOAD
2 x Vcc
6
V
VIH
Vcc
2.7
V
VT
VCC / 2
1.5
V
VLZ
150
300
mV
VHZ
150
300
mV
CL
30
50
pF
LVC QUAD Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
Test
Switch
Open Drain
Disable Low
Enable Low
VLOAD
Disable High
Enable High
GND
All Other tests
Open
LVC QUAD Link
CL=
Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate
≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
2. Pulse Generator for All Pulses: Rate
≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
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