參數(shù)資料
型號(hào): IDT74LVCH16244APAG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 0K
描述: IC BUFF DVR TRI-ST 16BIT 48TSSOP
標(biāo)準(zhǔn)包裝: 39
系列: 74LVCH
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 4
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1258 (CN2011-ZH PDF)
其它名稱: 74LVCH16244APAG
800-1683
800-1683-5
800-1683-ND
INDUSTRIALTEMPERATURERANGE
2
IDT74LVCH16244A
3.3VCMOS16-BITBUFFER/DRIVERWITH3-STATEOUTPUTS
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
6.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
1
OE
1
Y1
1
Y2
GND
1
Y3
1
Y4
VCC
2
Y1
2
Y2
GND
2
Y3
2
Y4
3
Y1
3
Y2
3
Y4
4
OE
GND
VCC
4
Y1
4
Y2
GND
4
Y3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
40
41
42
43
44
45
46
47
48
1
2
OE
1
A1
1
A2
GND
1
A3
1
A4
VCC
2
A1
2
A2
2
A3
2
A4
3
A1
GND
3
A3
3
A4
4
A1
4
A2
GND
4
A3
4
A4
3
OE
3
Y3
4
Y4
VCC
3
A2
GND
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
Inputs
Outputs
x
OE
xAx
xYx
LL
L
LH
H
HX
Z
FUNCTION TABLE (EACH 4-BITBUFFER)(1)
Pin Names
Description
x A x
Data Inputs(1)
x Y x
3-State Outputs
x
OE
3-State Output Enable Inputs (Active LOW)
PIN DESCRIPTION
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