參數(shù)資料
型號(hào): IDT821024PPG
廠(chǎng)商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/13頁(yè)
文件大?。?/td> 0K
描述: IC PCM CODEC QUAD NONPROG 44TQFP
標(biāo)準(zhǔn)包裝: 80
類(lèi)型: PCM 編解碼器/濾波器
數(shù)據(jù)接口: PCM 音頻接口
ADC / DAC 數(shù)量: 4 / 4
三角積分調(diào)變: 無(wú)
電壓 - 電源,模擬: 4.75 V ~ 5.25 V
電壓 - 電源,數(shù)字: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-TQFP
包裝: 托盤(pán)
其它名稱(chēng): 800-2624
821024PPG
IDT821024PPG-ND
QUAD NON-PROGRAMMABLE
PCM CODEC
IDT821024
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
FEBRUARY 9, 2009
2003 Integrated Device Technology, Inc.
DSC-6034/4
FEATURES
4 channelCODEC with on-chip digital filters
Selectable A-law or
-law companding
Master clock frequency selection: 2.048 MHz, 4.096 MHz or
8.192 MHz
- Internal timing automatically adjusted based on MCLK and
frame sync signal
Separate PCM and master clocks
Single PCM port with up to 8.192 MHz data rate (128 time slots)
Transhybridbalanceimpedancehardwareadjustableviaexternal
components
Transmitgainshardwareadjustableviaexternalcomponents
Low power +5.0 V CMOS technology
+5.0 V single power supply
Package available: 32 pin PLCC, 44 pin TQFP
FUNCTIONAL BLOCK DIAGRAM
Anolog Front End
CH2
Anolog Front End
CH1
Anolog Front End
CH3
Anolog Front End
CH4
DSP
PCM Interface
PCM TSA 1
PCM TSA 2
PCM TSA 3
PCM TSA 4
Clock
&
Reference Circuits
Control
PDN 1~ 4
A
/
IIN1
VOUT1
IIN2
VOUT2
IIN3
VOUT3
IIN4
VOUT4
MCLK
IREF
CNF
FSX1
FSR1
FSX2
FSR2
FSX3
FSR3
FSX4
FSR4
DX
TSC
DR
PCLK
VCCA
AGND
VCCD
DGND
DESCRIPTION
The IDT821024 is a single-chip, four channel PCM CODEC with on-
chip filters. The device provides analog-to-digital and digital-to-analog
conversions and supports both a-law and
law companding. The digital
filters in IDT821024 provides the necessary transmit and receive filtering
for voice telephone circuit to interface with time-division multiplexed
systems. All of the digital filters are performed in digital signal processors
operating from an internal clock, which is derived from MCLK. The fixed
filters set the transmit and receive gain and frequency response.
In the IDT821024 the PCM data is transmitted to and received from
the PCM highway in time slots determined by the individual Frame Sync
signals (FSR
n and FSXn, where n = 1-4) at rates from 256 KHz to 8.192
MHz. Both Long and Short Frame Sync modes are available in the
IDT821024.
The IDT821024 can be used in digital telecommunication applications
such as PBX, Central Office Switch, Digital Telephone and Integrated Voice/
Data Access Unit.
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