參數(shù)資料
型號: IDT82V2042EPFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 65/83頁
文件大?。?/td> 0K
描述: IC LIU T1/J1/E1 2CH SHORT 80TQFP
標(biāo)準(zhǔn)包裝: 45
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-TQFP(14x14)
包裝: 托盤
其它名稱: 82V2042EPFG
IDT82V2042E
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
TEST SPECIFICATIONS
68
December 12, 2005
Table-60 T1/J1 Receiver Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Test conditions
receiver sensitivity
Adaptive Equalizer disabled:
Adaptive Equalizer enabled:
-10
-20
dB
Analog LOS level
Adaptive Equalizer disabled:
Adaptive Equalizer enabled:
-4
800
-24
mVp-p
dB
A LOS level is programmable with Adaptive
Equalizer enabled. Not available in Hardware
mode.
Allowable consecutive zeros before LOS
T1.231-1993
I.431
175
1544
LOS reset
12.5
% ones G.775, ETSI 300 233
Receive Intrinsic Jitter
10 Hz - 8 kHz
10 Hz - 40 kHz
8 kHz - 40 kHz
Wide band
0.02
0.025
0.050
U.I.
JA enabled ( in receive path)
Input Jitter Tolerance
0.1 Hz – 1 Hz
4.9 Hz – 300 Hz
10 KHz – 100 KHz
138.0
28.0
0.4
U.I.
AT&T62411
ZDM
Receiver Differential Input Impedance
20
K
Internal mode
Input termination resistor tolerance
±1%
RRX
Receive Return Loss
39 KHz – 77 KHz
77 KHz - 1.544 MHz
1.544 MHz – 2.316 MHz
20
dB
G.703
Internal termination
RPD
Receive path delay
Single rail
Dual rail
7
2
U.I.
JA disabled
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