參數(shù)資料
型號(hào): IDT82V2048EDR
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 32/76頁(yè)
文件大?。?/td> 0K
描述: IC LIU T1/E1 8CH SHORT 208-TQFP
標(biāo)準(zhǔn)包裝: 12
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
其它名稱: 82V2048EDR
38
INDUSTRIAL
TEMPERATURE RANGES
OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
4.2
REGISTER DESCRIPTION
4.2.1
GLOBAL REGISTERS
Table-21 ID: Chip Revision Register
(R, Address = 00H)
Symbol
Bit
Default
Description
ID[7:0]
7-0
01H
00H is for the first version.
Table-22 RST: Reset Register
(W, Address = 20H)
Symbol
Bit
Default
Description
RST[7:0]
7-0
01H
Software reset. A write operation on this register will reset all internal registers to their default values, and the sta-
tus of all ports are set to the default status. The content in this register can not be changed.
Table-23 GCF0: Global Configuration Register 0
(R/W, Address = 40H)
Symbol
Bit
Default
Description
-7-6
0
Reserved
-
5
0
Reserved. For normal operation, this bit should be set to ‘0’.
T1E1
4
0
This bit selects E1 or T1/J1 operation mode globally.
= 0: E1 mode is selected.
= 1: T1/J1 mode is selected.
COPY
3
0
Enable broadcasting mode.
= 0: Broadcasting mode disabled
= 1: Broadcasting mode enabled. Writing operation on one channel's register will be copied exactly to the corre-
sponding registers in all the other channels.
INTM_GLB
2
1
Global interrupt enable
= 0: Interrupt is globally enabled. But for each individual interrupt, it still can be disabled by its corresponding Inter-
rupt mask Bit.
= 1: All the interrupts are disabled for all channels.
INT_PIN[1:0]
1-0
00
Interrupt pin operation mode selection
= x0: open drain, active low (with an external pull-up resistor)
= 01: push-pull, active low
= 11: push-pull, active high
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