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參數(shù)資料
| 型號： | IDTCV119EPV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | CLOCK GENERATOR FOR DESKTOP PC PLATFORMS |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 1/21頁 |
| 文件大?。?/td> | 118K |
| 代理商： | IDTCV119EPV |
COMMERCIAL TEMPERATURE RANGE
IDTCV119E
CLOCK GENERATOR FOR DESKTOP PC PLATFORMS
1
J ANUARY 2004
IDTCV119E
COMME RCIAL T E MPE RAT URE RANGE
CLOCK GENERATOR FOR
DESKTOP PC PLATFORMS
XTAL
Osc Amp
SM Bus
Controller
Watch Dog
Timer
Control
Logic
CPU CLK
Output Buffers
3V66/PCI
Output Buffers
SRC CLK
Output Buffer
48MHz
Output Buffer
X1
X2
SDATA
SCLK
V
TT_PWRGD
FS[1:0]
S
EL
24_48#
I
REF
I
REF
CPU[1:0]
CPU_ITP
REF 1.0
PCI[5:0], PCIF[2:0]
3V66[3:1]
SRC
48MHz[1:0]
PLL3
SSC
PLL4
PLL1
SSC
EasyN
Programming
PLL2
SSC
EasyN
Programming
RESET#
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-6551/6
FEATURES:
4 PLL architecture
Linear frequency programming
Independent frequency programming and SSC control
Band-gap circuit for differential output
High power-noise rejection ratio
66MHz to 533MHz CPU frequency
VCO frequency up to 1.1G
Support index block read/write, single cycle index block read
Programmable REF, 3V66, PCI, 48MHz I/O drive strength
Programmable 3V66 and PCI Skew
Available in SSOP package
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
IDTCV119E is a 48 pin clock generation device for desktop PC platforms.
This chip incorporates four PLLs to allow independent generation of CPU, AGP/
PCI, SRC, and 48MHz clocks. The dedicated PLL for Serial ATA clock
provides high accuracy frequency. This device also implements Band-gap
referenced I
REF
to reduce the impact of V
DD
variation on differential outputs,
which can provide more robust systemperformance.
Static PLL frequency divide error can be as low as 36 ppm providing high
accuracy output clock. Each CPU, AGP/PCI, SRC clock has its own Spread
Spectrumselection.
K EY SPECIFICATION:
CPU/SRC CLK cycle to cycle jitter < 125ps
SATA CLK cycle to cycle jitter < 125ps
PCI CLK cycle to cycle jitter < 250ps
Static PLL frequency divide error as low as 36 ppm
OUTPUT TABLE
CPU (Pair)
3
3V66
3
3V66/VCH
1
PCI
6
PCIF
3
REF
2
48MHz
2
24 - 48MHz
0
SRC (Pair)
1
Reset#
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDTCV119EPVG | 功能描述:IC CLK GEN DESKTOP PC 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDTCV119EPVG8 | 功能描述:IC CLK GEN DESKTOP PC 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDTCV122C | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC? CLOCK FOR P4 PROCESSOR |
| IDTCV122CPVG | 功能描述:IC FLEXPC CLK PROGR P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:FlexPC™ 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| IDTCV122CPVG8 | 功能描述:IC FLEXPC CLK PROGR P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:FlexPC™ 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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