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參數(shù)資料
| 型號(hào)： | IDTQS32257SO |
| 英文描述： | 2-Input Digital Multiplexer |
| 中文描述： | 2，輸入數(shù)字復(fù)接器 |
| 文件頁(yè)數(shù)： | 5/6頁(yè) |
| 文件大小： | 117K |
| 代理商： | IDTQS32257SO |
5
IDTQS74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OL
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
V
OH
ETC.
FCTL link
FCTL link
FCTL link
FCTL link
FCTL link
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Enable Low
All Other Tests
Closed
Open
FCTL
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
10MHz; Zo
≤
50
;
t
F
≤
2.5ns;
t
R
≤
2.5ns.
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