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參數(shù)資料
| 型號(hào)： | IDTQS3B2491TF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | 9-BIT EXCHANGER, TRUE OUTPUT, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 78K |
| 代理商： | IDTQS3B2491TF |
FEATURES/BENEFITS
Fully configurable Switch Matrix
Sub-nanosecond Propagation Delay
User-friendly Individual Port Control
Power-on Reset
Synchronous/Asynchronous Configuration Control
Programmable Active Terminators on each Port
Resistor options for line termination
Available in 64-pin TQFP package
DESCRIPTION
The QS3B491 and QS3B2491 are high speed Crossbar switches
organized as four independent 9-bit wide ports using QSI’s 0.5micron
CMOS technology. The switch matrix consists of N-channel FET switches
controlled by the configuration logic. When closed, the switches permit
bidirectional data flow with near-zero propagation delay. The N-channel
FETs also facilitate 5V to 3.3V, and 5V to 2.5V voltage translation between
ports.
The switch matrix can be configured for independent connection be-
tween any two ports as well as for multi-port broadcasting. Configuration
control is either synchronous or asynchronous. In the synchronous mode,
the control logic behaves like a Register. New configuration is stored on the
positive edge of the Clock (CLK) if Clock Enable (
CLKEN) is at logic LOW.
JULY 1999
1
1999 Integrated Device Technology, Inc
DSC-XXXXXX
QS3B491
QS3B2491
ADVANCE
INFORMATION
QUICKSWITCH PRODUCTS
HIGH-SPEED CMOS
CLOCKED 4 PORT X 9-BIT
CROSSBAR SWITCH
FUNCTIONAL BLOCK DIAGRAM
SW ITC H
MA TR IX
T
9
T
9
C P ort
(C 0
C 8 )
D P ort
(D 0
D 8)
A Port
(A
0
A
8 )
B Port
(B
0
B
8 )
CO NFIG UR AT IO N
C O NTROL LO G IC
4
T
9
T
9
OE
CL KE N
CL K
LE
2
22
S
A
S
B
S
C
S
D
T
CA
T
CD
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