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參數(shù)資料
| 型號： | ILC6382CIR-ADJ |
| 廠商： | Impala Linear Corporation |
| 英文描述： | 1-CELL TO 3-CELL BOOST WITH TRUE LOAD DISCONNECT, 3.3V, 5V OR ADJUSTABLE OUTPUT |
| 中文描述： | 1節(jié)至3與真正的負載斷開，3.3V或可調輸出5V的電池升壓 |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 1455K |
| 代理商： | ILC6382CIR-ADJ |
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Impala Linear Corporation
7
(408) 574-3939
www.impalalinear.com
Oct 1999
ILC6382 1.5
In the ILC6382, the switchover from PWM to PFM mode
occurs when the PWM waveform drops to a low duty cycle.
The low PWM duty cycle indicates to the controller that the
load current is small and so it switches over to the PFM
mode to improve efficiency and conserve power.
The Dual PWM/PFM mode architecture was designed
specifically for applications such as wireless communica-
tions, which need the spectral predictability of a PWM-type
DC-DC converter, yet also need the highest efficiencies
possible, especially in Standby mode.
Other Considerations
The other limitation of PWM techniques is that, while the
fundamental switching frequency is easier to filter out since
it's constant, the higher order harmonics of PWM will be
present and may have to be filtered out, as well. Any filter-
ing requirements, though, will vary by application and by
actual system design and layout, so generalizations in this
area are difficult, at best.
However, PWM control for boost DC-DC conversion is
widely used, especially in audio-noise sensitive applica-
tions or applications requiring strict filtering of the high fre-
quency components.
External Frequency Syncronization
External frequency syncronization is allowed on the
ILC6382. When an external signal between 150kHz to
500kHz is connected to pin 4, the internal oscillator will be
over-ridden. This technique is useful when designers wish
to synchronize two or more converters using the same
external source in order to avoid unexpected harmonics.
Connect pin 4 to ground or V
IN
if the external frequen-
cy syncronization function is not used.
Low Battery Detector
The ILC6382's low battery detector is a based on a CMOS
comparator. The negative input of the comparator is tied to
an internal 1.25V (nominal) reference, V
REF
. The positive
input is the LBI/SD pin. It uses a simple potential divider
arrangement with two resistors to set the LBI threshold as
shown in Figure 6. The input bias current of the LBI pin is
only 200nA. This means that the resistor values R1 and R2
can be set quite high. The formula for setting the LBI thresh-
old is:
VLBI = VREF x (1+R5/R6)
Since the LBI input current is negligible (<200nA), this
equation is derived by applying voltage divider formula
across R6. A typical value for R6 is 100k
.
R5 = 100k
x [(V
LBI
/V
REF
) -1], where V
REF
=1.25V (nom.)
The LBI detector has a built in delay of 120ms. In order to
get a valid low-battery-output (LBO) signal, the input volt-
age must be lower than the low-battery-input (LBI) thresh-
old for a duration greater than the low battery hold time
(t
hold(LBI)
) of 120msec. This feature eliminates false trigger-
ing due to voltage transients at the battery terminal caused
by high frequency switching currents.
The output of the low battery detector is an open drain
capable of sinking 2mA. A 10k
pull-up resistor is recom-
mended on this output.
Note that when the device is not
in PWM mode or is in shutdown the low battery detec-
tor does not operate.
For VLBI < 1.25V
The low battery detector can also be configured for voltages
<1.25V by bootstrapping the LBI input from V
OUT
. The cir-
cuitry for this is shown in figure 7.
V
SET
V
OUT
Switch Waveform
R6
R5
LBI/SD
3
2 V
IN
ILC6382
Shutdown
DELAY
100ms
1.25V
Internal
Reference
GND
7
LBO
3.3V
R
PU
6
+
-
Figure 5: PFM Waveform
Figure 6: Low Battery Detector
相關PDF資料 |
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|---|---|
| ILC6382 | 1-CELL TO 3-CELL BOOST WITH TRUE LOAD DISCONNECT, 3.3V, 5V OR ADJUSTABLE OUTPUT |
| ILC6383 | 1-Cell to 3-Cell Boost DC-DC Converter with True Load Disconnect, 3.3V, 5V or Adjustable Output |
| ILC6383CIR33X | 1-Cell to 3-Cell Boost DC-DC Converter with True Load Disconnect, 3.3V, 5V or Adjustable Output |
| ILC6383CIR50X | 1-Cell to 3-Cell Boost DC-DC Converter with True Load Disconnect, 3.3V, 5V or Adjustable Output |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ILC6383 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1-Cell to 3-Cell Boost DC-DC Converter with True Load Disconnect, 3.3V, 5V or Adjustable Output |
| ILC6383CIR-33 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| ILC6383CIR33X | 功能描述:直流/直流開關轉換器 DC/DC RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風格:SMD/SMT |
| ILC6383CIR-50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| ILC6383CIR50X | 功能描述:直流/直流開關轉換器 DC/DC Boost Conv 1to3 Cell RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風格:SMD/SMT |
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