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參數(shù)資料
| 型號(hào)： | ILC812SU |
| 英文描述： | Voltage Detector |
| 中文描述： | 電壓檢測(cè)器 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 61K |
| 代理商： | ILC812SU |
ILC811/ILC812 Microprocessor Reset Circuits
Impala Linear Corporation
3
(408) 730-3778
www.impalalinear.com
October 1999
Pin Functions
Circuit Description
Microprocessor Reset
The RESET pin is asserted whenever V
reset threshold voltage or if MR (manual reset) is forced low.
The reset pin remains asserted for a period of 240 ms after
V
CC
has risen above the reset threshold voltage or MR has
returned high. The reset function ensures the microprocessor
is properly reset and powers up into a known condition after a
power failure. RESET will remain valid with V
1.4V.
CC
falls below the
CC
as low as
V
The ILC811/ILC812 are relatively immune to negative-going
V
CC
glitches below the reset threshold. Typically, a negative-
going transient 125 mV below the reset threshold with a
duration of 50 μs (25 μs for ILC81_R/S/T) or less will not
cause an unwanted reset.
CC
Transients
Interfacing to Bidirectional Reset Pins
The ILC811/ILC812 can interface with μPs with bidirectional
reset pins by connecting a 4.7 k
ILC811/ILC812 output and the μP reset pin.
resistor in series with the
RESET Valid to 0V
A resistor can be added from the RESET pin to ground to
ensure the RESET output remains low with V
A 100 k
resistor connected from RESET to ground is
recommended. The size of the resistor should be large
enough to not load the RESET output and small enough to
pull-down any stray leakage currents.
CC
down to 0V.
Figure 3: RESET Valid to V
CC
= 0 V
Pin Name
Pin Number
ILC811
1
Description
ILC812
1
GND
Ground Pin.
RESET goes low if V
CC
falls below the reset threshold and remains asserted for one reset timeout
period (140 ms min.) after V
CC
exceeds the reset threshold.
RESET goes high if V
CC
falls below the reset threshold and remains asserted for one reset timeout
period (140ms min.) after V
CC
exceeds the reset threshold.
Manual reset input. A logic low on MR forces a reset. The reset will remain asserted as long as MR
is held low and for one reset timeout period (140 ms min.) after MR goes high. This input can be
shorted to ground via a switch or driven from CMOS or TTL logic. Float if unused.
Power supply input, 3 V, 3.3 V or 5 V.
RESET
2
N/A
RESET
N/A
2
MR
3
3
V
CC
4
4
V
TH
V
CC
t
R
MR
RESET
t
R
Reset
Generator
-
+
Reset
Threshold (V)
V
CC
MR
RESET
(ILC811)
RESET
(ILC812)
GND
4
3
2
1
ILC811
μP
100K
V
CC
V
CC
V
CC
RESET
RESET
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