- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378626 > IN7472D (INTEGRAL JOINT STOCK COMPANY) AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear PDF資料下載
參數(shù)資料
| 型號： | IN7472D |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear |
| 中文描述： | 與門控JK主從觸發(fā)器的復位和清除 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大小： | 242K |
| 代理商： | IN7472D |
IN7472
AC ELECTRICAL CHARACTERISTICS
(T = 25
°
C, V
CC
= 5.0 V, C
L
= 15 pF,
R
L
= 390
, Input t
r
= t
f
= 10 ns)
Symbol
Parameter
t
PLH
Propagation Delay Time, Low to High Level Output (from
Reset to Q)
Min
Max
25
Unit
ns
t
PHL
Propagation Delay Time, High to Low Level Output (from
Reset to Q)
40
ns
t
PLH
Propagation Delay Time, Low to High Level Output (from
Clear to Q)
25
ns
t
PHL
Propagation Delay Time, High to Low Level Output (from
Clear to Q)
40
ns
t
PLH
Propagation Delay Time, Low to High Level Output (from
Clock to Q or Q)
25
ns
t
PHL
Propagation Delay Time, High to Low Level Output (from
Clock to Q or Q)
40
ns
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
NOTES A. C
L
includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 3. Test Circuit
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN7472N | AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear |
| IN74AC00 | 30-AWG RED 50 FT ROLL |
| IN74AC02 | Quad 2-Input NOR Gate High-Speed Silicon-Gate CMOS |
| IN74AC02D | Quad 2-Input NOR Gate High-Speed Silicon-Gate CMOS |
| IN74AC02N | Quad 2-Input NOR Gate High-Speed Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN7472N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear |
| IN749A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| IN74AC00 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input NAND Gate High-Speed Silicon-Gate CMOS |
| IN74AC02 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input NOR Gate High-Speed Silicon-Gate CMOS |
| IN74AC02D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input NOR Gate High-Speed Silicon-Gate CMOS |
發(fā)布緊急采購，3分鐘左右您將得到回復。