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參數(shù)資料
| 型號(hào)： | IN74AC04D |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Hex Inverter High-Speed Silicon-Gate CMOS |
| 中文描述： | 六角變頻高速硅柵CMOS |
| 文件頁(yè)數(shù)： | 4/4頁(yè) |
| 文件大?。?/td> | 97K |
| 代理商： | IN74AC04D |
IN74AC04
22
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=3.0 ns)
V
CC
V
*
Guaranteed Limits
25
°
C
Symbol
Parameter
-40
°
C to
85
°
C
Min
Unit
Min
Max
Max
t
PLH
Propagation Delay, Input A to Output Y
(Figure 1)
3.3
5.0
1.5
1.5
9.0
7.0
1.0
1.0
10.0
7.5
ns
t
PHL
Propagation Delay, Input A to Output Y
(Figure 1)
3.3
5.0
1.5
1.5
8.5
6.5
1.0
1.0
9.5
7.0
ns
C
IN
Maximum Input Capacitance
5.0
4.5
4.5
pF
Typical @25
°
C,V
CC
=5.0 V
30
C
PD
Power Dissipation Capacitance
pF
*
Voltage Range 3.3 V is 3.3 V
±
0.3 V
Voltage Range 5.0 V is 5.0 V
±
0.5 V
Figure 1. Switching Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74AC04N | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:Hex Inverter High-Speed Silicon-Gate CMOS |
| IN74AC08 | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:Quad 2-Input AND Gate High-Speed Silicon-Gate CMOS |
| IN74AC109 | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| IN74AC109D | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
| IN74AC109N | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS |
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