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參數(shù)資料
| 型號： | IN74AC193D |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 元件分類： | 通用總線功能 |
| 英文描述： | PRESETTABLE 4 - BIT BINARY UP / DOWN COUNTER HIGH - SPEED SILICON - GATE CMOS |
| 中文描述： | 預(yù)置4 -位二進(jìn)制加/減計(jì)數(shù)器高速-高速硅-柵CMOS |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 350K |
| 代理商： | IN74AC193D |
TECHNICAL DATA
288
Presettable 4-Bit Binary UP/DOWN Counter
High-Speed Silicon-Gate CMOS
The IN74AC193 is identical in pinout to the LS/ALS193,
HC/HCT193. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
The counter has two separate clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When
the Parallel Load input is taken low the data is loaded independently of
either clock input. This feature allows the counters to be used as
devide-by-n by modifying the count lenght with the preset inputs. In
addition the counter can also be cleared. This is accomplished by
inputting a high on the Master Reset input. All 4 internal stages are set
to low independently of either clock input.Both a Terminal Count
Down (TC
D
) and Terminal Count Up (TC
U
) Outputs are provided to
enable cascading of both up and down counting functions. The TC
D
output produces a negative going pulse when the counter underflows
and TC
U
outputs a pulse when the counter overflows. The counter can
be cascaded by connecting the TC
U
and TC
D
outputs of one device to
the Count Up Clock and Count Down Clock inputs, respectively, of the
next device.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
High Noise Immunity Characteristic of CMOS Devices
Outputs Source/Sink 24 mA
IN74AC193
ORDERING INFORMATION
IN74AC193N Plastic
IN74AC193D SOIC
T
A
= -40
°
to 85
°
C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74AC193N | PRESETTABLE 4 - BIT BINARY UP / DOWN COUNTER HIGH - SPEED SILICON - GATE CMOS |
| IN74AC20 | DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC20D | DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC20N | DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC241 | Octal 3-State Noninverting Buffer/Line Driver/Line Receiver High-Speed Silicon-Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74AC193N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:PRESETTABLE 4 - BIT BINARY UP / DOWN COUNTER HIGH - SPEED SILICON - GATE CMOS |
| IN74AC20 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC20D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC20N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:DUAL 4-INPUT NAND GATE High-Speed Silicon-Gate CMOS |
| IN74AC240 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Octal 3-State Inverting Buffer/Line Driver/Line Receiver High-Speed Silicon-Gate CMOS |
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