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參數(shù)資料
| 型號(hào)： | IN74HC10AN |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS |
| 中文描述： | 三3輸入與非門(mén)高性能硅柵CMOS |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大小： | 177K |
| 代理商： | IN74HC10AN |
IN74HC10A
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
V
Guaranteed Limit
25
°
C
to
-55
°
C
Symbol
Parameter
≤
85
°
C
≤
125
°
C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, Input A,B or C to
Output Y (Figures 1 and 2)
2.0
4.5
6.0
95
19
16
120
24
20
145
29
25
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
IN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Gate)
Typical @25
°
C,V
CC
=5.0 V
25
C
PD
Used to determine the no-load dynamic power
consumption:
P
D
=C
PD
V
CC
2
f+I
CC
V
CC
pF
Figure 1. Switching Waveforms Figure 2. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/3 of the Device)
4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74HC10D | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:TRIPLE 3-INPUT NAND GATE |
| IN74HC10N | 制造商:INTEGRAL 制造商全稱(chēng):INTEGRAL 功能描述:TRIPLE 3-INPUT NAND GATE |
| IN74HC112A | 制造商:IKSEMICON 制造商全稱(chēng):IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
| IN74HC112AD | 制造商:IKSEMICON 制造商全稱(chēng):IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
| IN74HC112AN | 制造商:IKSEMICON 制造商全稱(chēng):IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
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